• Analog Custom Design & Analysis Examples

    Analog Custom Design & Analysis Examples

002_biaschk3 : Bias checking of device

Requires: SmartSpice & Smartview

Minimum Versions: SMARTSPICE 3.16.12.R

The .BIASCHK3 statement is intended to track and report the maximum duration time (dt) when the voltage difference between the specified device nodes or subcircuit terminals is larger than the user-defined reference voltage. It provides syntax to check specified terminals of chosen devices and subcircuits by specifying subcircuit names, hierarchy xcalls, device names, device types and device model names.

This example input deckshows how to use the ".biaschk3" statement to detect and report the maximum time duration when the monitored bias voltage is out of range. This algorithm is based on a simple criterion:

  • the "out-of-range" condition is defined by |Vbias| > |Vref|. The value of the user-defined reference voltage Vref must be specified in the .BIASCHK3 statement.

Statements:

  • .biaschk3 vref=2.0 devterminals="ncx nei" devices=x1.x1.x8.q5
  • .biaschk3 vref=2.0 devterminals="nci nbi" devices=x1.x2.x8.q5
  • .biaschk3 vref=2.0 devterminals="nplusp nminus" devices=x1.x2.x8.d3

Output: The waveforms show the simulated waveforms and the output table shows maximum delta time between nodes when voltage difference is larger than user-defined voltage level. Output log window shows part of (pngview) log_info.png information available in the log window for all the detected cases.

For full description, see the SmartSpice User's manual section 3.13 .BIASCHK3.

Input Files
Graphics
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