Non Planarized, Low k Dielectric Capacitance Analysis : Non Planarized, Low k Dielectric Capacitance Analysis

Requires: CLEVER

This example demonstrates the ability of CLEVER to deposit and field solve non planarised, multi-layer films for interconnect capacitance analysis using CLEVER. The simulation is run in 2D as there is little to be gained by running the demonstration in 3D. The user may force the simulator to do the full 3D simulation by simply commenting out the cut line statement, together with the TonyPlot statement (since in this case there will be no 2D structure for TonyPlot to plot). As with example 14, the message:

Warning: point is outside of layout domain

in the runtime output may be ignored since the program is merely informing the user that the cut line is bigger than the mask size due to the use of the padding statement which creates a larger boarder volume in order to improve accuracy.

To load and run this example, select the Load example button in DeckBuild. This will copy the input file and any support files to your current working directory. Select the run button to execute the example.