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Analog, Mixed-Signal, RF

Analog/AMS/RFComplete schematic-driven analog, mixed-signal, and RF circuit design environment.

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TCADPhysics-based semiconductor process and device simulation environment for TCAD engineers.

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Custom IC CAD

Custom IC CADIC layout, DRC/LVS verification, and RC parasitic extraction environment for analog, mixed-signal and RF design engineers.

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Interconnect Modeling

Interconect ModelingPhysics-based 3D extraction environment for RLCG passive RF components and interconnect parasitics.

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Digital CAD

DigitalDigital tools for cell library characterization, large core STA, Verilog simulation, fault analysis, placement and routing.

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Silvaco Celebrates 30 Years as a Leader in EDA Industry at 52nd DAC

Showcasing Reliability Solutions From TCAD to Power Integrity Signoff, Custom Design Flow and SPICE Modeling Solutions for IoT Applications, Advanced Node-Ready SPICE Simulator

Silvaco Relocates Japan Office to Landmark Tower to Support Company’s Global Expansion and Growing Demands for Full-Flow Solutions

Silvaco, Inc. (Silvaco) today announced the relocation of its Japan office to a new, larger facility in Japan’s prestigious Landmark Tower

Ritsumeikan University Adopted Silvaco’s Academic License

Silvaco Japan Co., Ltd (Silvaco) announced that Ritsumeikan University has adopted Silvaco's Analog EDA tools in the curriculum of the Department....

Silvaco to Exhibit at TSMC 2015 Technology Symposium in San Jose, Austin and Boston

Showcasing Reliability Solutions from TCAD to Verification, Custom Design Flow and SPICE Modeling Solutions for IoT applications, Advanced...

Simulation Standard

Plasmonic Light Trapping Transforming Thin-Film Photovoltaics
The photovoltaics (PV) market represents the fastest growing renewable energy technology, with a 35% annual growth rate, which is projected to be worth...

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Simulation Standard

Hints, Tips and Solutions
How can I develop my own etch model in Victory Process?
Background: Victory Process is packaged with a wide range of etch models. Victory Process also supports an “Open Modelling Interface” (OMI). The OMI...

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Simulation Standard

How can I Crop and Slice in the Victory Process 3D Exports?

This document is a short guide on the new and existing support for export...

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Simulation Standard

Hints, Tips and Solutions
Defining VWF Curve Target For Curve Calibration
VWF allows a curve as target for optimization. This feature greatly...

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Victory Process

3D Process Simulator

Victory Process is a general purpose 3D process simulator. Victory Process includes a complete process flow core simulator and three advanced simulation modules: Monte Carlo Implant, Advanced Diffusion and Oxidation, and Physical Etch and Deposit.

Victory Cell

3D Process Simulator For Large Structures

Victory Cell is a fast, layout-driven 3D process simulator specifically designed for large structures.


Process Simulation Framework

Athena framework integrates several process simulation modules within a user-friendly environment provided by Silvaco TCAD interactive tools.

SSuprem 4

2D Core Process Simulator

SSuprem4 is a 2D process simulator that is widely used in the semiconductor industry for design, analysis and optimization of various fabrication technologies.


Advanced Monte-Carlo Implantation Simulator

MCImplant is a generic ion implantation simulator, which models ion stopping, defect generation, and ion implantation distributions in amorphous and crystalline materials.


Advanced Physical Etching and Deposit Simulator

Elite is an advanced 2D topography simulator for modeling physical etching, deposition, reflow and CMP planarization processes for modern semiconductor technologies.

MC Etch & Deposit

2D Monte Carlo Deposition and Etch Simulator

MC Deposit/Etch is an advanced topology simulation module seamlessly interfaced with Elite through the ATHENA framework.


Advance 2D Optical Lithography Simulator

Optolith is a powerful non-planar 2D lithography simulator that models all aspects of modern deep sub-micron lithography: imaging, exposure, photoresist bake, development and reflow.

Victory Device

3D Device Simulator

Victory Device is a general purpose 3D device simulator. A tetrahedral meshing engine is used for fast and accurate simulation of complex 3D geometries.

Device 3D

3D Device Simulator

Device3D is a physics based 3D device simulator for any device type and includes material properties for the commonly used semiconductor materials in use today.

Giga 3D

3D Non-Isothermal Device Simulator

Giga3D module extends Device3D by incorporating the effects of self-heating into a device simulation.

MixedMode 3D

Circuit Simulation for Advanced 3D Devices

MixedMode 3D is a circuit simulator that includes physically-based 3D devices in addition to compact analytical models.

Quantum 3D

3D Simulation Models For Quantum Mechanical Effect

Quantum 3D provides a set of models for simulation of the various effects of quantum confinement and quantum transport of carriers in semiconductor devices.

Luminous 3D

3D Optoelectronic Device Simulator

Luminous 3D is an advanced simulator used to model absorption and photogeneration in semiconductor devices with arbitrary topology in three dimensions.


3D Amorphous and Polycrystaline Device Simulator

TFT 3D is an advanced device technology simulator equipped with the physical models and specialized numerical techniques required to simulate amorphous or polysilicon devices in 3D.


3D Light Emitting Diode Simulator

LED 3D is a module used for simulation and analysis of light emitting diodes. LED 3D is integrated in the ATLAS framework and allows simulation of electrical, optical and thermal behavior of light emitting diodes in 3D.

Magnetic 3D

3D Magnetic Device Simulator

Magnetic 3D module enables the ATLAS device simulator to incorporate the effects of an externally applied magnetic field on the device behaviour.

Thermal 3D

Thermal Packaging Simulator

Thermal 3D is a general heatflow simulation module that predicts heatflow from any power generating devices (not limited to semiconductor devices), typically through a substrate and into the package and/or heatsink via the bonding medium.


Device Simulation Framework

Atlas enables device technology engineers to simulate the electrical, optical, and thermal behavior of semiconductor devices.


Device Simulation Framework

Atlas enables device technology engineers to simulate the electrical, optical, and thermal behavior of semiconductor devices.


2D Silicon Device Simulator

S-Pisces is an advanced 2D device simulator for silicon based technologies that incorporates both drift-diffusion and energy balance transport equations.


2D Device Simulator for Advanced Materials

Blaze simulates devices fabricated using advanced materials. It includes a library of binary, ternary and quaternary semiconductors.


Non-Isothermal Device Simulator

Giga combined with S-Pisces and Blaze device simulators allows simulation of self heating effects.


Circuit Simulation for Advanced 2D Devices

MixedMode is a circuit simulator that includes physically-based devices in addition to compact analytical models.


2D Simulation Models for Quantum Mechanical Effects

Quantum provides a set of models for simulation of various effects of quantum confinement and quantum transport of carriers in semiconductor devices.


2D Optoelectronics Device Simulator

Luminous is an advanced device simulator specially designed to model light absorption and photogeneration in non-planar semiconductor devices.


2D Amorphous and Polycrystalline Device Simulator

TFT is an advanced device technology simulator equipped with the physical models and specialized numerical techniques required to simulate amorphous or polysilicon devices including thin film transistors.


2D Light Emitting Diode Simulator

LED is a module used for simulation and analysis of light emitting diodes.

Organic Display

OLED and OTFT Organic Display Simulator

Organic Display module enables ATLAS to simulate the electrical and optical properties of organic display devices such as OTFTs and OLEDs.

Organic Solar

Organic Solar Cell and Photodetector Simulator

Organic Solar module enables ATLAS to simulate the electrical and optical properties of organic solar cell devices, photodetectors and image sensors.


Semiconductor Laser Diode Simulator

Laser is the world’s first commercially available simulator for semiconductor laser diodes.


Vertical Cavity Surface Emitting Laser Simulations

VCSEL is used in conjunction with the ATLAS framework to produce physically based simulations of vertical cavity surface emitting lasers (VCSELs).


2D Small-Signal Noise Simulator

Noise combined with S-Pisces or Blaze allows analysis of the small-signal noise generated within semiconductor devices.


Ferroelectric Field Dependent Permittivity Model

Ferro has been developed to combine the charge-sheet model of FET with Maxwell’s first equation which describes the properties of the ferroelectric film.


2D Magnetic Device Simulator

Magnetic module enables the ATLAS device simulator to incorporate the effects of an externally applied magnetic field on the device behavior.


Fast Simulation of FETS

Mercury is an ATLAS module optimized for the fast simulation of FETs. Mercury is physics-based and so can be used for the predictive simulation of devices.

MC Device

2D Monte Carlo Device Simulator

MC Device simulates the behavior of relaxed and strained silicon devices including non-equilibrium and ballistic effects in 2D.


Radiation Effects Module

The REM Radiation Effect Module allows Atlas 2D/3D and Victory 3D simulators to model total dose, dose rate and SEU effects in semiconductors through the generation of defect states, fixed charge, and charge transport within insulating materials.

Victory Stress

3D Stress Simulator

Victory Stress is a generic 3D stress simulator designed to calculate stresses, strains and mobility enhancement for 3D structures as well as stress evolution during multiple step process flows.


Interactive Deck Development and Runtime Environment

DeckBuild is an interactive runtime and input file development environment within which all Silvaco’s TCAD and several other EDA products can run.


Integrated Layout Editor

MaskViews is a simple to use, yet powerful layout editor that can read, write, create and edit layout files in either GDS2 or Silvaco’s layout format.


Structure and Mesh Editor

DevEdit can be used to either create a device from scratch or to remesh or edit an existing device.


1D/2D Interactive Visualization Tool

Tonypolot is a powerful tool designed to visualize TCAD 1D and 2D structures produced by Silvaco TCAD simulators. TonyPlot provides visualization and graphic features such as pan, zoom, views, labels and multiple plot support.

TonyPlot 3D

3D Interactive Visualization Tool

TonyPlot 3D is a powerful graphics tool, capable of displaying 3D TCAD data generated by Silvaco TCAD process or device simulators and Silvaco's 3D parasitic products.



VWF is software used for performing Design of Experiments (DOE) and Optimization Experiments. Split-lots can be used in various pre-defined analysis methods.


Schematic Editor

Gateway supports both flat and hierarchical designs and can be used to create designs for both analog and digital. Gateway is fully integrated into our analog and digital simulators.


Analog Circuit Simulator

SmartSpice delivers the highest performance and accuracy required to design complex high precision analog circuits, analog mixed-signal circuits, analyze critical nets, characterize cell libraries, etc.. SmartSpice is compatible with popular analog design flows and foundry-supplied device models.

Verilog-A Language

Source, Compiled and Encrypted

The Verilog-A language when combined with SmartSpice can provide circuit designers the ability to write custom models and verification of complex designs.

SmartSpice RF

Frequency and time domain RF circuit simulator

SmartSpice RF combines Time-Domain Shooting and Frequency Domain Harmonic Balance methods to provide accurate simulation of RF circuits.


Analog/Mixed-Signal Simulator

Hamony is an analog/mixed signal simulator that provides all the capabilities of SmartSpice and Silos and through this give the accuracy, performance, capacity and flexibility to simulate circuits expressed in Verilog, SPICE, Verilog-A and Verilog-AMS.

Utmost III

Device Characterization and modeling

Utmost III generates accurate, high quality SPICE models for analog, mixed-signal and RF applications.

Utmost IV

Device Characterization and SPICE Modeling

Building on many years experience, Utmost IV provides a powerful yet easy-to-use tool for the characterization of devices and the generation of accurate, compact models, macro-models and Verilog-A models for analog and RF applications.


Statistical Parameter and Yield Analysis

Spayn is a statistical modeling tool for analyzing variances from model parameter extraction sequences, electrical test routines, and circuit test measurements.


Power - EM/IR - Thermal

Silvaco’s realibity analysis methodology answers design challenges and more accurately models IR-Drop, EM and thermal effects across all process nodes.


Layout Editor and Viewer

Expert is a high performance hierarchical IC layout editor with full editing features, large capacity and fast layout viewing.


DRC/LVS/NET Physical Verification

Guardian provides interactive and batch mode verification of analog, mixed signal and RF IC designs.


Full-Chip Parasitic Extraction

Hipex is an accurate and fast full-chip hierarchical extraction software that performs extraction of parasitic capacitances and resistances from hierarchical layouts.

Clarity RLC

RLC Netlist Reduction

Clarity RLC is an efficient and accurate tool that performs reduction of linear parasitic RLC elements in extracted netlists. Tool is based on Scattering-Parameter-Based Macromodeling and Time Domain methods.


Full Chip LPE Rule File Generator

Exact delivers the most accurate interconnect models for nanometer semiconductor processes and generates full chip layout parameter extraction (LPE) rule files.


3D RF Passive Device Modeling

Quest calculates 3D frequency dependent inductance, resistance, capacitance and capacitive loss for any multi-port network for RF SPICE analysis.


RC Extractor for Realistic 3D Structures

Clever is a physics-based RC extractor that uses GDSII mask data and process information to create a realistic 3D structure for MEMS, advanced CMOS, TFT, Memory cells, etc., using its built-in etch/deposit processor and optolithographical simulator.


3D Physics-Based RC Extractor for Large Cells

Stellar fills the size gap between typical small cell field solvers and full chip extractors.


Verilog Simulator

Silos is an easy-to-use IEEE-1364-2001 compliant Verilog simulator used by leading IC designers. An industry standard since 1986, its powerful interactive debugging features provide today’s most productive design environment for FPGA, PLD, ASIC and custom digital designs.


Mixed-Level Fault Simulator

HyperFault is a Verilog IEEE-1364-2001 compliant fault simulator that analyzes test vectors’ ability to detect faults. Supports mixed levels of gate, behavioral, and switch with SDF timing.


Cell Characterization and Modeling

AccuCell is an accurate, automated, fast and flexible software tool for characterizing and validating standard cell, I/O and custom cell libraries.


Block Characterization, Modeling and STA

AccuCore performs timing characterization of multi-million device circuits with SmartSpice accuracy and performs block and full-chip Static Timing Analysis (STA) on multi-million gate designs.

Catalyst AD

SPICE Netlist to Verilog Gates Converter

Catalyst AD is the premier tool for converting transistor-level designs into verilog gate-level representations with applications in microprocessor, DSP, graphics and high-speed communication markets.

Catalyst DA

Verilog Netlist to SPICE Netlist Converter

Catalyst DA is a software program that translates a structural Verilog netlist into equivalent SPICE format netlist to be used for layout verification or SPICE simulation.


Place and Route Design Flow

Spider is a netlist-to-GDSII place and route design flow for mainstream physical design and implementation.