Leakage Current Calibration Procedures of Amorphous Silicon Thin-Film Transistors



Amorphous silicon Thin-Film Transistors (a-Si TFTs) are widely used as the switching device of liquid crystal display (LCD) technology. For development and analysis of a-Si TFTs, many research groups are trying to understand the physical mechanisms of a-Si TFTs. In particular, leakage current behavior is a major consideration for switching devices like a-Si TFTs. To analyze the leakage current mechanisms, calibration with numerical simulation is required.

In the next section, we describe a-Si TFT density of states (DOS) models and their implementation in ATLAS. Some examples of calibration procedures using them are also described.


Density of States and Probability of Occupation

Traps, called density of states, are located in the forbidden bandgap of a-Si TFTs. DOS have two different states which are called “donor-like states” and “acceptor-like states”. The acceptor-like states are electrically neutral when empty, and they become negatively charged when trapping electrons. The donor-like states become positively charged by emitting an electron, and they are neutral when filled. DOS act as recombination center where electrons and holes have a capture/emission process [1]. The probability of occupation (f(E)) describes that DOS are either filled or empty in the traps. Figure 1 shows the basic capture and emission processes in the a-Si TFT [2]. The probability that a trap will contain an electron is represented as f(E). The function of (1-f(E)) represents the probability that the trap will emit an electron.

Figure 1. (a) Trap occupancy of a trapping level under non-equilibrium conditions (b) probability of occupation (c) conceptual diagram of DOS, probability of occupation, and ionized densities in the a-Si TFTs.


Figure 2. Examples of ATLAS simulation results with DEFECT and SAVE TRAP.FILE statements.


In ATLAS, DOS can be applied to a-Si TFT using DEFECT statements such as:

DEFECTS cont numa=24 numd=24 nta=1.12e21 ntd=4e20 wta=0.025 wtd=0.05 nga=5e17 ngd=1.5e18 ega=0.4 egd=0.4 wga=0.1 wgd=0.1 sigtae=1e-16 siggae=1e-16 sigtdh=1e-16 siggdh=1e-16 sigtah=1e-14 siggah=1e-14 sigtde=1e-14 siggde=1e-14 tfile=DOS_profile.dat

The probability of occupation at a specified position of the device is also saved in the .dat file by using a SAVE TRAP.FILE statement such as:

SAVE TRAP.FILE=trap_in_front_channel.dat x=3 y=-0.705

The charge trapped in the DOS contributes to the total space charge and affects the recombination rate [3] [4]. These effects are accounted for by an additional charge term expression of the Poisson’s equation and by a modified expression of the recombination rate in the continuity equations [5].


Equation 1. Poisson’s equation with additional charge term and modified recombination rate of a-Si TFTs in the ATLAS.



Leakage Current Calibration Procedure

The leakage currents are mainly affected by density of states (DOS) and band to band tunneling (BBT) in the a-Si TFTs. In order to calibrate simulation data to measured result, bias conditions are considered carefully. Under the negatively low gate voltage conditions, DOS effects are dominant in the leakage current. In this case, amounts and shapes of DOS are major calibration parameters. When the amounts of DOS are increased or decreased, probability of occupation is an important factor that affects leakage current amounts. Probability of occupation has a value in the range of 0 to 1 and it accounts for the probability that states are empty or filled. As a results, it affects space charge and recombination rate which determine the leakage currents of device.

In negatively high gate voltage conditions, energy band bending may be sufficient to allow electrons to tunnel from the valence band into the conduction band generating electron-hole pairs (EHP). This band-to-band tunneling (BBT) mechanism is implemented into the continuity equation in ATLAS. As a result, BBT parameters like as BB.B, BB.A, and BB.GAMMA are important parameters for calibration in this bias region.

Figure 3 (a) shows the example of a-Si TFT device structure which was used in the TCAD simulation. The TFT with a bottom gate structure was proceed by the ATHENA process simulator. Donor-like traps and acceptor-like traps are initially defined as in Figure 3(b). The material properties are identified by MATERIAL statements in ATLAS. Figure 4(a) shows the simulated probability function and ionized densities of acceptor-like traps in the front channel. The transfer curve characteristic of the device is also represented in Figure 4(b). From this point in time, differences between simulation data and measured data need to be analyzed. DOS and physical model parameters should be modified to match simulation results with measured results..

Figure 3. Example of (a) a-Si TFT structure and (b) density of state in the a-Si region.

In the beginning of calibration with DOS, you should select the gate bias condition as the initial point. After that, you need to find the energy level of the probability function where it rapidly varies from 1 to 0. For example, when you start calibration at Vg=0V, you can see the simulation result in Figure 4(a) that the probability function rapidly varies near 1.3eV in the energy bandgap. The variation of DOS near 1.3eV brings much change of ionized density and recombination rate. So you can effectively calibrate the simulation data by increasing or decreasing DOS which is located near 1.3eV in the bandgap.

Figure 4. Plot of density of states, the probability of occupation, ionized density of trap of front channel position and transfer curve of the a-Si TFT.

Therefore, it is good to know the probability function behaviors as a function of gate voltage. As shown in Figure 5, probability of occupation of acceptor like traps in the front channel moves to the conduction band as the gate voltage is increased. According to the positively large gate voltage, electron concentration in the front channel is increased. Then the probability function of acceptor like trap, which means the probability filled with electron in the trap, increased. As a result, ionized densities of acceptor-like trap increase as the gate voltage increases.

Figure 5. The gate voltage dependency of probability of occupation of acceptor like trap and ionized densities of acceptor like trap.


In a similar way, negatively large gate voltage causes additional holes in the front channel and they make the probability of donor-like trap moves to valance band. As a result of probability function, ionized densities of donor-like trap increase as the gate voltage decreases.

After you know the dominant energy level which affects total current of a-Si TFTs in the given gate voltage, you have to select the DOS which is varied for calibration. DOS behavior can be predicted on the assumption that the probability function is the same in the different DOS. As the acceptor-like traps were increased, the states of electron capture are increased and they cause less free carriers in the conduction band. Consequently, total current of a-Si TFTs is decreased. In the donor like trap, larger DOS means larger electron emission states to conduction band. So total current of a-Si TFTs is increased as the donor-like traps increase. Figure 6 shows the relationship between DOS and total current. As the acceptor-like traps are increased, total currents are decreased. On the other hand, total currents are increased as the donor like traps are increased. This mechanism can be useful for more accurate calibration.

Figure 6. Total currents behavior of a-Si TFTs as a function of (a) acceptor-like traps and (b) donor-like traps.

If a sufficiently high electric field exists within a-Si TFTs, local band bending may be sufficient to allow electrons to tunnel. Therefore, electrons tunnel from the valence band into the conduction band generating electron-hole pairs (EHP). This EHP generating effect can be explained by the band-to-band tunneling (BBT) model which depends on the electric field as shown in Equation 2.

Equation 2. The standard model of the BBT generation rate in the ATLAS.

Figure 7 shows the relationship between BBT parameters and the transfer curve. Due to the fact that BB.A, BB.GAMMA, and BB.B cause different transfer curve shapes, BBT parameters are useful to calibrate a-Si TFTs in this bias condition.

Figure 7. Total current behavior of a-Si TFT as a function of (a) BB.A, (b) BB.GAMMA, and (c) BB.B.



This article has shown the Density Of States (DOS) model and their implementation of in amorphous silicon TFT in ATLAS. To analyze the leakage current of a-Si TFT, TCAD is the most useful tool which contains the accepter-like trap and donor-like trap model. In the leakage current calibration, not only DOS but also probability of occupation is important to understand behavior of defects and total currents. When the gate voltage is highly negative, BBT model needs to apply for leakage current calibration.



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  2. Shaw, John G., and Michael Hack, “An Analytical Model For Calculating Trapped Charge in Amorphous Silicon”, J. Appl. Phys. Vol. 64, No. 9 (1988): 4562-4566.
  3. Shockley W., and W.T. Read, “Statistics of the Recombination of Holes and Electrons”, Phys. Rev. 87 (1952): 835-842.
  4. Hall, R.N., “Electron Hole Recombination in Germanium”, Phys. Rev. 87 (1952): 387.
  5. ATLAS User’s Manual.

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