Coupled Optimization of Diode and IGBT Characteristics Under Clamped Inductive Switching in ATLAS MixedMode and Virtual Wafer Fab (VWF)



Virtual Wafer Fab’s powerful range of optimizers are used to investigate and minimise the coupled switching losses of a TCAD IGBT and its clamping diode in a chopper circuit. It is shown that it is vital that the designer concurrently optimizes both the switching losses of the IGBT and the clamping diode in a single operation.



One of the fundamental goals when designing power devices is to minimise the energy losses. Device designers will commonly consider the turn-off loss v’s on-state loss trade-off curve [1]. An optimized, stand-alone device is typically considered to be on where its forward voltage drop / turn-off loss characteristics lie around the knee of the trade-off curve.

Although this is simple and fast, in reality these devices are to be used inside circuits. The devices will be coupled with other devices and parasitic elements. Furthermore, just because a stand-alone device is optimized it does not mean that when incorporated in a circuit the device parameters previously decided upon are still optimum in terms of energy loss [2].

In this article a very similar methodology to that found in [2] is followed. The principle difference is that the IGBT and clamping diode are TCAD devices created in ATLAS and the clamped inductive switching (CIS) is undertaken in MixedMode rather than the MATLAB/Simulink environment as was the case in [2]. Furthermore, for the optimization experiments, Virtual Wafer Fab (VWF) was used. VWF is a commercially available tool that can be used for Design Of Experiments (DOE) and multi-target optimization experiments packaged in a user friendly GUI.


Clamped Inductive Switching in ATLAS

Both the clamping diode and IGBT were created in ATLAS. The diode is shown in Figure 1 and the IGBT is shown in Figure 2. The two devices were then combined in a chopper circuit. The chopper circuit was created in MixedMode.

Figure 1. The Diode structure used in the optimization experiment.


Figure 2 The vertical, 1200 V NPT IGBT structure used in the optimization experiment.


The MixedMode circuit is shown in Figure 3. For the purposes of this exercise the circuit was kept quite simple. The primary parasitic element is the stray inductance (shown as LS) with an additional small stray inductance also incorporated at the source (not shown). The gate pulse duty cycle was set at 0.5 and the switching frequency was set at 25KHz as this will typically emphasise switching losses [2]. Additionally, the load inductor, L1 was replaced by a current source, negating the need to charge the inductor for the turn-on loss calculations.

Figure 3. The MixedMode chopper circuit used for the optimization experiments in VWF.


The gate resistor, Rg was fixed at 50 ohms and the rail voltage, V1 was fixed at 600V. The width of the device was selected so that 25 A was switched. The circuit element shown as AIGBT denotes the TCAD IGBT made in ATLAS. The IGBT is a simple, vertical NPT, planer 1200V device with a uniform value of lifetime throughout the bulk silicon. The element shown as ADIODE is the ATLAS diode. Again, the diode is a simple vertical device. The diode also has uniform bulk lifetime except for a band in the vicinity of the PN junction where lifetime killing has been performed.


The Optimization Process

The deck and structures were initially validated in ATLAS. The decks were then imported into VWF. VWF is a next-generation, feature rich tool that can be used for both Design Of Experiments (DOE) and Optimization Experiments. VWF can read in decks from SILVACO’s process, device, parasitic extraction and circuit simulators. For DOE, split-lots can use various pre-defined analysis methods or manually assigned values. The range of analysis methods available include 3 level full factorial, Box-Behnken and Latin Hypercube amongst others.

All the simulations can then be carried out either in parallel, on a cluster of workstations or on a single SMP machine. Results can then be directly imported into SPAYN, SILVACO’s statistical parameter and yield analysis tool, or exported into third party data analysis tools.

To undertake an optimization experiment, one or more variables in the imported deck are chosen, VWF will then optimize these variables against a defined target. Several global and local optimization routines are available including:

  • Genetic Algorithm
  • Simulated Annealing
  • Hooke-Jeeves
  • Levenberg-Marquardt
  • Parallel Tempering
  • Differential Evolution

The deck used in this experiment was highly parameterized using SET statements. A portion of the deck after being imported into VWFII can be seen in Figure 4 showing a selection of the predefined variables. Those shown in red indicate that they will be used as variables in the subsequent optimization experiment. t is the bulk lifetime in the IGBT and th is the bulk lifetime in the diode. Both the IGBT and diode bulk lifetimes were varied between 3 x 10-7 and 3 x 10-5 s.

Figure 4. The ‘Deck’ tab in VWF II’s optimization module showing the highly parameterized deck and the optimization variables (shown in red).


The switching losses were calculated using EXTRACT statements. The turn-on, turn-off and on-state losses of the IGBT and diode were all monitored independently to see the effect had through varying the lifetimes not only on the system as a whole but on the individual components as well. The sum of the IGBT and diode switching losses was used as the optimization target. In VWF the results from every EXTRACT statement are automatically passed into the worksheet. Typical current / voltage switching waveforms from the experiment are shown in Figure 5. The extracted energy losses for each run are displayed in the Results tab in VWF as shown in Figure 6. A graphical representation is also provided in VWF as shown in Figure 7.

Figure 5. Typical IGBT switching waveforms from the optimization experiment.


Figure 6. A section of the worksheet showing extracted values for the total energy loss and for the IGBT and diode individually for a selection of variables (please note the Total Energy Loss column is in Joules and multiplied by 1 x 105 whereas igbt_all and diode_all are true values in Joules).


Figure 7. Graphical representation of the optimization experiment showing the total energy loss (Joules x 105) versus iteration number. The lowest achieved values can be seen to the right and are at approximately 7.43 mJ.


Results and Discussion

The lowest total switching losses achieved in this instance was 7.4 mJ of which 1.6mJ was lost in the diode and 5.8mJ was lost in the IGBT. Figure 8 shows a 3D plot of the total energy losses under switching versus IGBT lifetime and diode lifetime. The 3D plot indicates that taking the lifetime of either the diode or the IGBT to an extreme causes an increase in switching losses. Therefore providing a minima. The minima in the case of Figure 8 is shown by the line marked ‘A’. Interestingly, this indicates that for a low value of diode lifetime there is little variation in switching losses as a function of IGBT lifetime.

Figure 8. Total Energy Loss (IGBT + Diode) versus Diode and IGBT Lifetime. The Arrows indicate the general trend of the energy losses.


The IGBT switching losses versus diode and IGBT lifetime are shown in Figure 9. Generally there is no great variation in losses except at the extremes of the variables used. Figure 9 demonstrates the dependency of the IGBT switching losses on the diodes lifetime. This can be done by considering a certain value of IGBT lifetime then observing how the IGBT losses change as a function of Diode lifetime. This observation is more evident for lower values of IGBT lifetime.

Figure 9. IGBT Energy Loss versus Diode and IGBT Lifetime. The Arrows indicate the general trend of the energy losses.


Figure 10 shows the diode switching energy losses as a function of the diode and IGBT lifetime. The plot indicates that generally a high IGBT lifetime and a low diode lifetime is required to achieve low diode losses which is contrary to the IGBT’s needs as shown in Fig 9 where a low diode lifetime and a low IGBT lifetime yields the lowest IGBT switching losses, although the variation is small. Overall it is clear that diodes switching losses control the overall characteristics of the circuit despite the fact that they typically contribute only around 30% of the switching losses, except at extremes. Where very low switching losses are observed the percentile contribution made by the diode falls as low as around 20%. When the total switching losses are high the percentile contribution of the diode increases and can achieve 70%.

Figure 10. Diode Energy Loss versus Diode and IGBT Lifetime. The Arrows indicate the general trend of the energy losses.



In this investigation, a more simplified problem to that described in [2] was considered. Focus was applied on simply optimizing the lifetime in a coupled diode and IGBT. For the experiment considered here it has been shown that there is a significant interdependency between the IGBT and diodes switching characteristics. It has also been shown in the instance examined here that the as long as the diodes switching losses are minimized then the IGBT lifetime can be allowed to vary significantly with no great expense of the overall switching losses.



We would like to acknowledge Dr M. R. Sweet at the Electrical Machines and Drives Research Group, University of Sheffield, Sheffield, England for his assistance in this work.



  1. D.W. Green, K.V. Vershinin, M Sweet, E.M.S. Narayanan, “Anode Engineering for the Insulated Gate Bipolar Transistor—A Comparative Review”, IEEE Transactions on Power Electronics, Volume: 22, Issue: 5, 2007, pp 1857 – 1866
    A.T. Bryant; P.R. Palmer, E. Santi, J.L. Hudgins, “Simulation and Optimization of Diode and Insulated Gate Bipolar Transistor Interaction in a Chopper Cell Using MATLAB and Simulink”, IEEE Transactions on Industry Applications, Volume: 43, Issue: 4, 2007, pp. 874 - 883


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