Two-Dimensional ATLAS Device Simulation of an Organic Light-Emitting Field-Effect Transistor Using a Heterostructure Inside the Transistor Channel

Sarah Schols, Stijn De Vusser and Paul HeremansIMEC, Kapeldreef 75,B3001 Leuven,Belgium


1. Introduction

Organic semiconductors have been incorporated in a wide range of devices, including organic thin-film transistors (OTFTs) and circuits, organic solar cells, organic non-volatile memories and organic light-emitting diodes (OLEDs). Display applications are a particularly important driver for the further development of this organic technology.

Light-emitting organic field-effect transistors (LEOFETs) may become an interesting structure in this field, as they combine the optical output of an OLED and the gate control of an OTFT in a single device. Therefore, displays based on LEOFETs may eliminate the difficult integration of the light-emitting structure and the organic driving backplane. Moreover, LEOFETs are interesting devices in order to study the opto-electronical properties of organic semiconductors.

Since the first realization of a LEOFET in 2003 [1], LEOFETs have been realized using polymers [2, 3], small molecules [4, 5] and a heterostructure of a p-type and an n-type organic semiconductor [6]. Recently, results were published on LEOFETs based on an ambipolar polymeric semiconductor [7].

Another type of LEOFET comprises a heterojunction inside the transistor channel. In this case excitons are generated at the interface of an n-type and a p-type semiconductor. Therefore, the recombination zone can be located inside the transistor channel, away from the metal source and drain electrodes. More detailed information about the fabrication of this light-emitting transistor can be found elsewhere [8]. In order to understand the basic device operation numerical device simulations are important.


2. The Device Structure

The device structure is shown in Figure 1. The oxide layer on top of the gate is 100nm thick. Above this dielectric layer an n-type and a p-type semiconductor layer are defined. Both layers have a thickness of 60nm and overlap each other in the middle of the channel defining a heterojunction.

Figure 1: A cross-section of the device structure


The material parameters used in the simulations are summarized in Table 1 and correspond to the material parameters of PTCDI-C13H27, which is the n-type semiconductor and OOctyl-OPV5, used as p-type semiconductor. Source and drain electrodes are positioned at x < 1 µm and x > 9 µm, respectively.

  P-type N-type
LUMO (eV) 2.9 3.4
HOMO (eV) 5.4 5.4
µe (cm2/Vs) 1x10-8 2.5x10-2
µh (cm2/Vs) 3.5x10-4 1x10-8
VT (V) -15 3
Table 1: Material parameters used for the simulations.


In fact, the traditional nomenclature of source and drain is ambiguous in this type of device, since both electrodes do inject carriers in the organic materials, and neither of them actually drains carriers.

Therefore, we will refer to the electrode that injects holes in the p-type semiconductor as the hole source. The hole source is also the electrode that is held at ground potential (VH = 0). The electron source, at potential VE, is defined as the electrode that is connected to the n-type semiconductor.


3. Simulation Results and Discussion

Figure 2 shows the experimentally measured [8] as well as the simulated output characteristics of the device. As can be seen, there is a good agreement between the simulated characteristics and the experimentally observed electrical data.

Figure 2. Electrical characteristics of the device: experimentally measured (solid curves) and simulated (dashed curves).


The characteristics can be qualitatively explained as follows: for a fixed negative gate voltage VG, holes are injected from the hole source into the p-type material, and a hole accumulation layer is formed. Since the HOMOs of both organic semiconductors are almost equal to each other, holes encounter a negligible barrier at the p-n junction; thus, the hole accumulation layer extends over the complete transistor channel. In a first operation regime, for electron source voltages |VE| < |VG - VT,n| (in which VT,n is the threshold voltage of the n-type material), there is only a very low current. Indeed: the hole mobility in the n-type material is low, and in this regime, there are no electrons available yet which the holes can recombine with. As soon as |VE| ≥ |VG - VT,n|, the device enters a second operation regime. Electrons are injected from the electron source into the n-type material, forming an electron accumulation layer. The electron and hole accumulation layers meet somewhere in the channel, and every hole transported from the hole source through the p-type material is expected to recombine with an electron that is carried from the electron source through the n-type semiconductor.

The current through the device increases quadratically, as can be expected for any n-type transistor of which VG and VD are constant, while VS decreases. At a certain electron source voltage VE, the electron current in the n-type material becomes equal to the hole current in the p-type material. From this voltage on, the LEOFET operates in a third regime. In contrast to previously published LEOFETs [6, 7], increasing |VE| beyond this voltage leads to a saturation of the current. This is explained by the fact that the current in this kind of device is limited by the smallest of the electron and the hole currents. In this third operation regime, the p-type OTFT is in saturation, and its saturated current limits the overall current through the device.

It is assumed that the light emission zone moves within the transistor channel, exactly as has been previously described by Zaumseil et al. [7]. Figure. 3 clearly illustrates that this is indeed the case. The recombination region moves from right to left (i.e., from the n-region to the p-region) by increasing |VE| while keeping VG at a fixed negative value. At a sufficiently negative VE, the recombination zone is located at the far edge of the n-type material. Electrons face a relatively high injection barrier at the interface with the p-type material. Therefore, the recombination zone does not move further.

Figure 3: Numerical simulations indicate that the recombination zone moves within the transistor channel by increasing |VD|.

(a) Vg=-20V and Vd=-30V, (b) Vg=-20V and Vd=-40V, (b) (c) Vg=-20V and Vd=-45V


4. Conclusion

The experimental output characteristics of a light-emitting transistor using a heterostructure of an n- and a p-type organic semiconductor inside the transistor channel are well simulated by ATLAS. The numerical simulations also show that the actual recombination region shifts within the transistor channel by changing the biasing conditions, confirming previously published results.


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