Process Flow Simulation and Manufacture of Variable RF MEMS Capacitors

Yong Qing Fu, Jack Luo, Stuart Milne, Andrew Flewitt
Engineering Department, University of Cambridge, Cambridge UK
Ahmed Nejim
Silvaco, St Ives, Cambridgeshire PE27 5JL, UK


The application of microelectromechanical systems (MEMS) to radio-frequency (RF)/microwave systems is on the verge of revolutionizing wireless communications, mainly in the areas of wireless personal communication systems, wireless local area networks, satellite communications, and automotive electronics [1]. In this article we present a brief introduction to the design and fabrication effort at the Engineering Department, University of Cambridge, which is focused on variable RF capacitor MEMS structures. Silvaco 2D/3D process simulation was used to simulate the process flow and reproduce the obtained structures as a first step to future process flow and structure designs.

Variable RF capacitors with a-Si:H (doped with phosphine) cantilevers have been designed and fabricated with different length top multi-cantilever electrodes (Figure 1). This was done to produce a discrete increase of the capacitance with the applied voltage. Increasing the applied voltage will pull down the cantilever beams sequentially. The structure consists of a bottom electrode (Cr), a top electrode (a-Si:H doped with phosphine) with suspended multi-length cantilevers overhanging on the bottom electrode, and a layer of high K material (HfO2) as an insulating layer.

Figure 1. Schematic illustration of the variable capacitor RF MEMS switch. The top beams snap down one by one as applied voltage increase.


a-Si:H film was chosen for its potential for MEMS applications. The high deposition rate (as high as 100A/s has been reported [2]), relatively low stress, and low deposition temperature (can be as low as 100oC, thus glass and plastics are applicable) [3] make it a good candidate for such applications. Add to that the good electronic properties (with phosphine and boron doped) and reasonable mechanical properties of a-Si:H film suggests that they can be used as the structural layers for thin film MEMS.

High-k material, HfO2, was used as an insulating layer between the bottom and top electrodes to increase the tuning range of the capacitance, because the increase in the capacitance is proportional to the dielectric constant e of the insulator material.

Using the consideration of the opposite forces seen by the suspended cantilevers, the pull in voltage is defined as the threshold voltage when the mechanical restoring force can no longer balance the electrostatic force, and the cantilever abruptly falls to the bottom contact. The calculation of these forces produced the following pull in voltage data as a function of cantilever length and the separating gap.

Figure 2. The calculated pull-in voltage as a function of cantilever length and air gap.



Fabrication Process

Figure 3 illustrates schematically the fabrication process followed to realize the cantilevers. Crucially the last step (the cantilever release) involves the sacrificial etch of the PECVD deposited oxide.

Figure 3. Schematic illustration of the fabrication process flow. Each represents a cut plane along a cantilever.


This fabrication process was simulated using Silvaco CLEVER 3D builder programme. The original mask set file in .cif format contained many repeated cells. Using MaskViews it was possible to view these masks and crop the unwanted cells. The resulting mask set was utilized in building a typical cell by following the above process flow in CLEVER.

Figure 4. The cantilever mask set viewed in MaskViews.


Once the mask set was defined the four mask process was followed as defined in Figure 3. The process culminated in the release step where all the underlying oxide is removed. The final 3D structure produced by the simulation can be seen from various points of view in Figure 5.

Figure 5. Results from 3D simulation of the MEMS process flow using CLEVER.


The cross section view obtained from a cut plane along the middle cantilever is shown in Figure 6.

Figure 6. Cross sectional view (2D) through one of the cantilevers.


The obtained data show a good match to the SEM micrographs obtained from the manufactured structures as in Figure 7.

Figure 7. SEM morphologies of the fabricated capacitors with different width and lengths.


Further details of the manufacturing process and the material analysis as well as the function of these cantilever capacitors can be found other publications [4,5].



Using existing mask sets, it is possible to obtain good match between the manufactured variable capacitor MEMS and the 3D simulations using CLEVER. This is a first step in using mask design and process simulation to define future generations of these cantilever structures.

This 3D simulator has been integrated into a comprehensive design environment as part of an EU sponsored project “PROMENADE (507965)” which is coming into its testing phase.



  1. H. J. D. L. Santos, G. Fisher, H. A. C. Tilmans, J. T. M. van Beek, IEEE Microwave Mag. 4 (2004) 36-65.
  2. A. H. Mahan, Y. Xu, D. L. Willaimson, W. Beyer, J. D. Perkins, M. Vanecek, L. M. Gedvilas, B. P. Nelson, J. Appl. Phys., 90 (2001) 5038-5047.
  3. J. P. Conde, J. Gaspar, V. Chu, Thin Solid Films, 427 (2003) 181-186.
  4. Y.Q. Fu, J. K. Luo, S. B. Milne, A. J. Flewitt, W. I. Milne, Mater. Sci. Engng. B, 124 (2005) 132-137.
  5. J.K.Luo, M.Lin, Y.Q.Fu, H.Lin, A.J.Flewitt, S.M.Spearing, N.A.Fleck, W.I.Milne, MEMS digital variable capacitors with a high-k dielectric insulator, EUROSENSOR 2005, Sept. 12-15, Barcelona, Spain.

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