HiSIM version 1.0 Model Released in UTMOST III
Introduction
HiSIM is a MOSFET model for SPICE circuit simulation that has been developed by Hiroshima University and STARC Company.
This model present several advantage on the extraction point of view, with a reasonable number of parameters, a physical reliability of the equations for a wide range of geometries (down to 0.1um) and a unified description of devices characteristics for all bias conditions.
It has been implemented in Silvaco Spice Simulator, SmartSpice and in our current extraction software UTMOST III.
This article presents an efficient extraction procedure for HiSIMv1.0 parameters using UTMOST III. This procedure will lead to a model card accurate for a wide range of geometries. It is widely inspired from the one proposed by STARC in its “HiSIM1.0 User’s Manual”, but it has been adapted and optimized for UTMOST III users.
Data Collection and Initial Parameter
The extraction procedure presented in this article requires DC measurement that can be obtained using the BSIM3_MG routine on a Large and Wide device and an Larray of devices (See articles for BSIM3_MG extraction routine in the previous issues of the Simulation Standard.). In this case “BSIM3_MG” should be used as a measurement routine only.
Following STARC recommendations, IDS vs. VGS measurements should be performed for VDS=50mV and 1V. IDS vs. VDS measurements will be performed for VBS=0V and 1V. For those last characteristics, the Voffset value which is used to calculate the first VGstart value (Vgstart = VTextracted + Voffset) defaults to 0.2V.
The recommended number of points per sweep in the BSIM3_MG routine is 51 and the number of VGS steps and VBS steps are 5.
In addition, to be able to extract Quantum Mechanical Effect parameters and Poly Depletion effect parameters, Intrinsic Gate capacitance vs. Vgs should be measured on Large and Wide device.
The typical number of geometries used for model parameter extraction is 10. There should be a large device with wide W and long L (to avoid short channel or narrow width effects) to extract the root parameters (as mobility parameters, substrate impurity concentration and flat band voltage). An array of short L devices will be used to extract short channel parameters. It has to be noticed that HiSIM includes two kind of short channel effect parameters: One for the standard short channel effect, and the other for the reverse short channel effect. We will see later in this section how this two effects lead to separate the Larray of devices in two parts depending on which parameters need to be optimized.
Restrictions This article gives a procedure to extract most of HiSIMv1.0 parameters. However, some effects are not taken into account, their corresponding parameters extraction will require another article in a future Simulation Standard. Those parameters are: Narrow channel, Channellength modulation, Substrate Gate and GIDL current, 1/f Noise parameters.
Model Parameters
To get significant results for an HiSIMv1.0 extraction, the initial set
of values for HiSIM parameters is important. UTMOST III
provides you a default model card that should be used as a starting point.
Detail of this model card is shown in Table 1.

Table 1: HiSIMv1.1 default model card.
Geometry Selection
As mentioned above, we have three “group” of device geometry
that will be used separately depending on the kind of parameters that
will be extracted.
The Long and Wide device used for mobility, flat band voltage and substrate impurity concentration parameters extraction.
The split of the Larray should be done according to the Vth dependency on the channel length, which can be observed through UTMOST validate routine. The Larray of devices will be split in two parts depending on what kind of short channel parameters will be optimized.
Standard short channel effect makes VTH grows with L gate, while Reverse short channel effect has the opposite influence.
The bigger devices of the Larray will be used for reverse short channel effect parameters, while the smaller devices, will be used for standard short channel effect.
Figure 1. VTH dependence on L  UTMOST routine “Validate“.
On the example shown in Figure 2, the middle group
includes devices from 10x5 to 10x0.2 while short group includes devices
from 10x0.13 to 10x0.11. This split of the Larray is valid for low VDS.
Figure 2. VTH dependence on L for a
High
VDS  UTMOST routine “Validate”.
VTH dependence on L for high VDS (VDS=1V) will show a middle group including devices from 10x5 to 10x0.5 while short group will include device from 10x0.15 to 10x0.11.
Local Optimization Strategies
After the data is collected, The ALL_DC routine can be used for local optimization. In this article’s example a single ALL_DC routine will be used. The different types of data will be displayed in the ALL_DC graphics screen for different optimization strategies. This may require more user interface but it is easier to follow each step of local optimizations this way. Later the user may automate the local optimization strategies by utilizing the different ALL_DC routines. The operation of the local optimization is explained in the UTMOST User Manual.
Strategy #30: idvg_large_HiSIM
This strategy is used for the wide W and long L device only. As it can
be seen in the figure 3, it will optimize the “Current” of
“ID/VG” characteristics. The Wide Wand long L device should
be selected in the “Geometry Selection Screen” (figure 5)
for each row in this strategy. The ID/VG characteristics of this device
(wide W and long L) should be present in the graphics screen The first
row of the optimization is used for the substrate impurity concentration
and the flat band voltage parameters optimization. The “sweep/start”
is set to 1and “sweep/stop” to 5. This will ensure that these
parameters in row#1 will be optimized for VBS values. This Optimization
is done only for low VDS. We have fixed the current from 1E12A to 10%
of maximum current because the region of interest is the subthreshold
region.
Figures 3 and 4 show that the second row is exactly the same than the first one. It is used to iterate this optimization.
Figure 3. Local optimization strategy definition
screen for Strategy#30 (idvg_large_HiSIM)
Figure 4. Local optimization target
selection
screen for Strategy#30 (idvg_large_HiSIM)
Figure 5. Local optimization geometry
selection screen for
Strategy#30 (idvg_large_HiSIM)
Strategy #31: idvg_middle_HiSIM
This strategy is used to optimized pocket penetration length and maximum
pocket concentration (LP and NSUBP) in a first step, then reverse shortchannel
coefficient 1 and 3 for pocket (SCP1 and SCP3) in a second one. It will
optimize the “Current” of “ID/VG” characteristics
(Figure 6). The middle devices of the Larray should be selected for each
row in this strategy. Pocket parameters are going to be optimized for
all VBS value (“sweep/start” set to 1 and “sweep/ stop”
to 5) while short channel parameters are optimized only for VBS=0V, as
there is no VBS effect on standard short channel effect. All this strategy
is done for low VDS. Those parameters are optimized in subthreshold and
around threshold region. As for Strategy 30, step 1 and 2 are duplicated
in order to iterate the optimization.
Figure 6. Local optimization strategy
definition
screen for Strategy#31 (idvg_middle_HiSIM)
Figure 7. Local optimization target
selection
screen for Strategy#31 (idvg_middle_HiSIM)
Strategy #32: idvg_short_HiSIM
As the previous ones, the strategy#32 will optimize the “Current”
of “ID/VG” characteristics. The aim of this strategy is to
optimize the short channel parameters PARL2, SC1 and SC3. As standard
short channel effect is much more sensible on very small devices, the
short devices part of the Larray will be used for optimization. Region
of interest is subthreshold region for all VBS and low VDS. As with previous
strategy, several iteration of the same step are required.
Figure 8. Local optimization strategy
definition
screen for Strategy#32(idvg_short_HiSIM)
Figure 9. Local optimization target
selection
screen for Strategy#32 (idvg_short_HiSIM)
Strategy #33: idvg_highVT_HiSIM
Strategy #33 aims to take into account VDS influence on the different
effects we have studied previously (Flat band voltage, standard short
channel and reverse short channel effects). This strategy, as the previous
ones, will perform optimization on the “Current” of “ID/VG”
characteristics. Region of interest is subthreshold for all VBS values,
but this time optimizations are going to be performed at low and high
VDS.
First step optimized flat band voltage (VFBC) on the Large and Wide device for low and high VDS.
Second step is used to optimized reverse short channel effect dependency on VDS (SCP2). This is done on middle devices of the Larray for low and high VDS. As mentioned above (in geometry selection section), the middle group is not the same for low VDS and high VDS.
Third step is used to optimized standard short channel effect dependency on VDS (SC2). Optimizations are performed on short devices for low and high VDS.
Figure 10. Local optimization strategy
definition
screen for Strategy#33 (idvg_highVT_HiSIM).
Figure 11. Local optimization target
selection
screen for Strategy#33 (idvg_highVT_HiSIM).
Strategy #34: idvg_highVT2_HiSIM
As preceding strategy, the aim of strategy #34 is to optimize short channel
effect dependency to VDS. While strategy #33 was a rough extraction of
SC2 and SCP2, this one has a refinement purpose. This is obtained by optimizing
the “Current” of “ID/VG” characteristics in subthreshold
region for high VDS only. The first step optimized SCP2 on middle devices
while the second step optimized SC2 on short devices. As for previous
strategies, those steps are iterated. Check that short and middle devices
groups are the ones defined for high VDS.
Figure 12. Local optimization strategy
definition
screen for Strategy#34 (idvg_highVT2_HiSIM).
Figure 13. Local optimization
geometry selection screen for Strategy#34 (idvg_highVT2_HiSIM, step 1&2) 
Strategy #35: idvg_lowMue_HiSIM
This one is dedicated to mobility parameters optimization. Optimizations
are going to be performed on the “Current” of “ID/VG”
on the Large and Wide device. Many different iteration are necessary due
to the strong correlation of those parameters effects in the different
area of the characteristics.
First step will be used for a rough extraction of MUECB0, MUECB1, MUEPH1 and MUESR1 in subthreshold region for a low VDS and 0V VBS (sweep_start = sweep_stop = 1).
Second step will refine MUECB1 in subthreshold region
for low VDS and all VBS.
Third step is used for MUEPH1 optimization; this will be done just after
threshold region for high VDS and all VBS.
Fourth step is used for MUESR1 optimization in saturation region for high VDS and all VBS.
Fifth step refine MUECB0, MUECB1 in subthreshold region for low VDS and all VBS.
Sixth step refines MUEPH1 in just above threshold region for high VDS and all VBS.
Last step refines MUEPH1 and MUESR1 together in saturation region for high VDS and all VBS.
Figure 14. Local optimization strategy
screen
for Strategy#35 (idvg_lowMue_HiSIM).
Figure 15. Local optimization target
selection screen
for Strategy#35 (idvg_lowMue_HiSIM).
Strategy #36: idvg_highVD_HiSIM
The strategy#36 is used for the high VDS, ID/VGVB characteristics of
all the Larray devices. The aim is to optimize velocity parameters on
saturation region of the curve for all VBS. Optimized parameters are VMAX,
VOVER and VOVERP.
Figure 16. Local optimization strategy
definition
screen for Strategy#36 (idvg_highVD_HiSIM).
Figure 17. Local optimization target
selection
screen for Strategy#36 (idvg_highVD_HiSIM).
Strategy #37: idvd_saturate
HiSIM
Strategy #37 is applied to “Current ID/VDVG” characteristics
for the smaller devices of the Larray for both low and high VBS. The
aim is to optimize gate overlap length (XLD) in addition to velocity parameters
(VMAX, VOVER, VOVERP). The optimization is performed in saturation region.
Figure 18. Local optimization strategy
definition
screen for Strategy#37(idvd_saturate_HiSIM).
Figure 19. Local optimization target
selection
screen for Strategy#37 (idvd_saturate_HiSIM).
Strategy #38: idvd_linear_HiSIM
Strategy #38 is used to optimize contact resistance and potential barrier
resistance parameters (RS, RD and RPOCK1, RPOCK2) on ID/VDVG curve at
low VBS. A single step is used for those optimizations. They are performed
in linear region of the characteristics (VDS start=0, VDSstop=0.5, sweep
start=3, sweep stop=5) for Large and Wide device and middle devices.
Figure 20. Local optimization strategy
definition
screen for Strategy#38 (idvd_linear_HiSIM).
Figure 21. Local optimization strategy
target selection
screen for Strategy#38 (idvd_linear_HiSIM).
Local Optimization Sequence
The following sequence is presented as an advice to obtain a good
model extraction procedure. It is NOT recommended to run all the sequence
at once. The user should run each strategy one by one and observe the
optimization results after each strategy is completed. By running sequentially
the sequence, the user will be able to repeat some strategies or to come
back in the procedure to obtain a better fit. The following sequence should
be seen as a hint to achieve a good extraction:
 Rough optimization of technological then mobility parameters:
idvg_large_HiSIM idvg_lowMue_HiSIM idvg_large_HiSIM
 extraction of short channel effect parameters:
idvg_middle_HiSIM idvg_large_HiSIM idvg_middle_HiSIM idvg_short_HiSIM idvg_middle_HiSIM idvg_short_HiSIM (x2)
 extraction of VDS dependence of short channel effect:
idvg_highVT_HiSIM idvg_highVT2_HiSIM(x4)
 extraction of mobility and velocity parameters:
idvg_lowMue_HiSIM idvg_highVD_HiSIM idvd_saturate_HiSIM
 extraction of resistance parameters:
idvd_linear_HiSIM
Poly Depletion and QuantumMechanical Effect Direct Extraction
UTMOST III now includes a routine dedicated to Poly depletion and Quantummechanical effect direct extraction. This new algorithm can be accessed from INTCAP  CGG routine. INTCAP is an UTMOST III routine dedicated to MOSFETs Intrinsic capacitance measurement, extraction and optimization. Description of how to use this routine can be found in “UTMOSTIII  Extraction manual Vol 1”.
This algorithm should be applied to a Large and Wide device.
To access QMExx and PGDxx parameters extraction algorithm, in your “SPICE MODEL FILE” screen, HiSIM model should be selected (Figure 22).
In INTCAP “Fitting Variables” screen (Figure 23), set “qme/pgd” variable to  0 for QME1,2,3 and PGD1,2 parameters extraction,
 1 for QME1,2,3 parameters extraction only,
 2 for PGD1,2 parameters extraction only.
Figure 22. Spice model selection
screen 
Figure 23. INT.CAP fitting variables
screen 
If variable “hisim_tox” is set to 1, TOX parameter will also be extracted.
To activate the extraction algorithm, when INTCAPCGG characteristic is displayed, press “Options / Fit” from the “GRAPHICS” screen.
Warning: QME and PGD extraction algorithm requires the following parameters to be known precisely: LP, NSUBP, BGTMP1, BGTMP2. Be sure they have been extracted and that the corresponding values are in the “Optimized column” before using it.
Conclusion
A total of 9 local optimization strategies and one direct extraction routine for HiSIMv1.0 model have been presented in this article. The local optimizations should not be used without any user’s modification. Go into each strategy and change the selected geometries in the “Geometry Selection Screen” according to the available devices, and the observation of the “VTH dependence on L”. The user should also check if the region of interest specified in each strategy is properly selected by the criteria defined in the “Target selection screen”.
References
 M. MiuraMattausch, H.Ueno, H. J. Mattaush, H. Kawano, D. Kitamaru, K. Hisamitsu, T. Honda, S. Matsumoto, D. Miyawaki, H. Nagakura, S. Nara, D. Navarro, T. Okagaki, S. Ooshiro, Y. Shiraga, K. Suematsu, M. Suetake, M. Tanaka, Y. Tatsumi, T. Yamaoka, S. Kumashiro, T. Yamaguchi, K. Yamashita, N. Nakayama "HiSIMv1.0 User’s Manual" STARC
 Silvaco International, "UTMOST III Extractions Manual Volume 1, MOSFET Modeling routines"
 Silvaco International, "UTMOST III User’s Manual"
Contacts
Hiroshima University
Silvaco International, http://www.silvaco.com
STARC, http://www.starc.jp/