Simulating Impurity Freeze-Out During Low Temperature Operation


The low temperature operation of many device structures has been shown as an effective method for improving device performance without reducing device size. Performance improvements for MOS-based technologies include increased operating speed, enhanced latch-up immunity, and better subthreshold characteristics [1]. By modeling low temperature phenomena, numerical simulation of device operation at low temperatures provides an effective means for analyzing such performance improvements before investing manufacturing time or money. It is the purpose of this paper to discuss the modeling of the dopant freeze-out phenomenon in ATLAS and provide an application example of its use.

At low temperatures, the thermal energy within a semiconductor is not high enough to fully activate all of the donor and acceptor impurity atoms. As a result, the carrier concentrations will not equal the concentration of dopant atoms. Figure 1 shows simulated data of the equilibrium electron concentration as a function of temperature for n-type silicon doped at 10cm. Below 100 K there is not enough thermal energy within the silicon to fully ionize the impurity atoms. This region of operation is known as the freeze-out regime. At temperatures between 100 K and 550 K, sufficient thermal energy resides within the silicon to fully ionize the impurity atoms. This region of operation is known as the extrinsic regime. As the temperature increases beyond 550 K, the intrinsic carrier concentration approaches and then exceeds the impurity concentration and the silicon returns to intrinsic-type behavior [2].

Figure 1: Electron concentration as a function
of temperature in n-type silicon.


Device Model

Within ATLAS, Poisson's Equation is used to relate the electrostatic potential to the space charge density in a semiconductor device. The local space charge density is the sum of all positive and negative charges including all mobile and fixed charges, electrons, holes, and ionized impurities. Poisson's equation including the carrier concentrations, ionized donor and acceptor impurity concentrations, and charge due to the presence of traps and defects has the form [3]:

where e is the dielectric constant, Y is the electrostatic potential, q is electronic charge, n and p are the electron and hole concentrations per unit volume, respectively, and ND+ and NA- are the ionized impurity concentrations. By default, ATLAS assumes complete ionization of all dopant impurities and that no traps or defects exist within the device (i.e. ND+ = ND,Total, NA- = NA,Total, and QT = 0). To account for the loss of space charge due to the incomplete ionization of dopant atoms, the incomplete ionization model available in ATLAS must be explicitly invoked using the MODELS statement.

Impurity freeze-out is modeled in ATLAS using Fermi-Dirac statistics and degeneracy factors associated with the conduction and valence energy bands. The ionized donor and acceptor concentrations are calculated as [3]:

where EDB and EAB are the respective donor and acceptor ionization energies and GCB and GVB are the respective degeneracy factors. ND+ and NA are the net compensated n-type and p-type doping concentrations, respectively. Where net compensated doping is defined as [3]

If Ntotal ? (ND,total – NA,total) > 0

Then ND = |Ntotal| and NA = 0

Otherwise NA = |Ntotal| and ND = 0

The incomplete ionization model may be explicitly set by including the INCOMPLETE parameter on the MODELS statement. Table 1 lists the default parameter values for EDB, EAB, GCB, and GVB in ATLAS. Figure 2 shows simulated data obtained for electron concentration as a function of temperature for three different ionization energies. As can be seen, even at 100 K the ionization energy can have a substantial effect on carrier concentration therefore it is highly recommended that accurate ionization energies are determined for low temperature simulation. A more complete list of ionization energies is available in [4].


Table 1. Default model parameters for incomplete ionization.


Figure 2: Electron concentration as a function of temperature
for n-type silicon with varying values of ionization energy.

For heavily doped structures, the assumption of a localized ionization energy does not hold up. Simply modeling the temperature dependence of the ionization energy will not adequately account for the underlying physics. It is generally accepted to assume total ionization for doping concentrations above some threshold (3x10 cm in ATLAS) and to use some transitional function to determine the partial ionization between complete ionization and that predicted by Equations 2 and 3 [5]. When simulating devices doped beyond threshold, the ionization energies used in Equations 2 and 3 may be modified to obtain more accurate results as follows [3]:

Complete ionization is assumed for structures doped higher than 3x10 cm. For structures with doping levels between 10 cm and 3x10 cm, linear interpolation is used to fit the ionization energies. The modified ionization model may be selected using the IONIZ parameter on the MODELS statement.



The importance of modeling incomplete ionization in the freeze-out regime will be illustrated by examining the saturation behavior of a DMOS device. Figure 3 presents the base DMOS device structure used for this analysis. The device has a lateral channel extending 1.8 µm beneath the gate oxide with a peak doping density of 5x10cm. Below the lateral channel, an n-type epilayer of 6 µm doped at 10 cm is used to sustain high voltage. The gate is n+ polysilicon doped at 10 cm. The gate oxide is 60 nm thick. For this work, only half of the device structure was simulated as it was adequate for examining the influence of dopant freeze-out.

Figure 3: Simulated cross section of the DMOS device.


In the on-state, a DMOS device conducts current from the source through the lateral channel beneath the gate oxide and finally to the drain via the substrate epilayer. Figure 4 presents the simulated subthreshold characteristics for the DMOS device described above at both 77 K and 300 K. As the device turns on, the drain current increases with gate voltage over an isolated voltage range. This region of operation is referred to as the pre-quasi-saturation region. Beyond the pre-quasi-saturation region, the drain current saturates becoming independent of the gate bias. This region of operation is referred to as the quasi-saturation region and it represents an important aspect of DMOS behavior [1].

Figure 4: Saturation characteristics for DMOS device at 77 K and 300 K.


In the pre-quasi-saturation region, electrons are exposed to a large electric field and traverse the lateral channel at their saturation velocity. As a consequence, the drain current is the product of the electron concentration and the saturation velocity. Electron concentration therefore is a primary factor in determining the resulting drain current and accounting for incomplete ionization at low temperatures is essential [1]. Also note in Figure 4 the higher transconductance seen for the 77 K device in the pre-quasi-saturation region.

For the DMOS device biased to quasi-saturation, the situation is different. The large electric field experienced during pre-saturation is no longer present and the charge carriers no longer travel at their saturated velocity. Variations in device performance in this region between the 77 K and 300 K device are primarily related to the temperature dependence of the carrier mobilities [1]. Figure 5 compares the predicted saturation behavior for the DMOS device using three different model sets, one disregarding incomplete ionization, another incorporating only the local space charge model, and the final set accounting for dopant concentrations above threshold. As can be seen, the simulation results obtained without an incomplete ionization model predict a much high saturation current due to increased carrier mobility and no loss of carrier concentration. The other two simulations predict saturation currents above that of the 300 K device, but their saturation currents have been reduced due to incomplete ionization.

Figure 5: Saturation characteristics for DMOS device
at 77 K and 300 K (alternate model sets).



A brief review of the incomplete ionization model available within ATLAS has been presented. The importance of modeling incomplete ionization during low temperature simulations was shown through the analysis of the subthreshold behavior of a DMOS device. It was shown that for device simulations below 100 K accurate modeling of incomplete ionization is necessary to maintain accuracy.



  1. C. Liu, K. Lou, and J. Kuo, "77 K Versus 300 K Operation: The Quasi-Saturation Behavior of a DMOS Device and its Fully Analytical Model," IEEE Transactions on Electron Devices, vol. 40, pp. 1636-1644, September 1993.

  2. E. Yang, Microelectronic Devices, New York, McGraw-Hill, 1988.

  3. ATLAS User's Manual, Silvaco International, November 1998.

  4. S.M. Sze, Physics of Semiconductor Devices, New York, John Wiley & Sons, 1981.

  5. S. Selberherr, "MOS Device Modeling at 77 K," IEEE Transactions on Electron Devices, vol. 36, pp. 1464-1474, August 1989.