 Hints, Tips and Solutions

Volume 12, Number 2, February 2002

Q. How can I ensure that the vertical Y.MESH spacing in my process simulation is adequate for my particular implant condition ?

A. A good technique to check that the mesh is not causing a problem is to perform an integration of the as-implanted species, directly after the implant within ATHENA. There are two ways the user may do this either by using an EXTRACT command or through TonyPlot.

To illustrate, if I perform the following implantation:

implant arsenic dose=1.0e13 energy=50

the EXTRACT command to integrate the dose is

extract name="Simulated dose" area from curve(depth, impurity="Arsenic" material= "Silicon" mat.occno=1 x.val=0.1)*1e-4

The scaling factor of 1e-4 exists to convert from um on the depth scale to cm. Depending upon the mesh density different values of "Simulated dose" will be obtained. These values can vary up to 50% of the desired dose for a poor mesh, clearly a problem. By improving the quality of the mesh, in this case by reducing the Y.MESH spacing at the silicon surface, the error may be reduced to less than 1% which is quite good enough. In this case for a surface Y.MESH spacing of 0.001 um the output is

EXTRACT> extract name="Simulated dose" area from curve(depth, impurity="Arsenic" material="Silicon" mat.occno=1 x.val=0.1)*1e-4 Simulated dose=9.97292e+12 X.val=0.1

The same analysis may be performed inside TonyPlot by using the integration tool underneath the "Tools" menu. Figure 1 shows an Arsenic profile and the resultant integrated dose of 9.93e12 cm-2 which is less than 1% error. Figure 1.

Q. Is there a method that can extract the capacitance from a three-dimensional device ?

A. A simple method to extract the capacitance in 3D is to perform a very simple transient analysis. Simple theory gives us that the theoretical capacitance is

C = I x dt/dV

To illustrate this I have chosen a simple MOS capacitor of 1um x 1um in area with a oxide thickness of 200A. Using Device3D an initial solution is obtain at a gate voltage of -3V before a transient ramp is applied to the gate contact with a final gate voltage of 3V. Thus the capacitance is

C= I(gate) x ramptime(sec)/6

where the ramptime is given on the transient analysis statement

solve vgate=3 ramptime=6e-4 tstop=6e-4 dt=1e-5

The ramptime for the gate voltage can be chosen to reproduce either the low frequency or high frequency CV curves for the MOS capacitor. Figure 2 illustrates this with a ramptime of 600s for the low frequency CV curve and 6us for the high frequency curve. Figure 2.

 Call for Questions If you have hints, tips, solutions or questions to contribute, please contact our Applications and Support Department Phone: (408) 567-1000 Fax: (408) 496-6080 email: support@silvaco.com