BSIM3v3.2 Model Released in SmartSpice and UTMOST III


The latest Berkeley BSIM3v3.2 model of June 16 1998 is now available in the SmartSpice 1.5.5 release.

Two BSIM3v3.2 implementations are supported in SmartSpice and UTMOST III.

The Silvaco implementation of the Berkeley BSIM3v3.2 model can be invoked by specifying the model selector LEVEL=8 and the version selector VERSION=3.2 in the .MODEL definition. This version is now used as the default BSIM3v3 model. Older BSIM3v3 models can be invoked by specifying VERSION=3.0 or VERSION=3.1.

The original Berkeley BSIM3v3.2 model implementation is also available as LEVEL=81 VERSION=3.2 model.

The Silvaco BSIM3v3.2 model is fully compatible with the Berkeley model when commonly acceptable model parameters are used. However, the Silvaco implementation fixes certain bugs, supports a number of additional parameters and options, and provides certain improvements compared to what is supported in the Berkeley BSIM3v3.2 model.

The BSIM3v3.2 model is not fully compatible with older BSIM3v3 models. The explicit specification of the VERSION selector in the .MODEL definitions is strongly recommended to avoid incompatibility problems.


New Features in BSIM3v3.2

UC Berkeley has announced the following BSIM3v3.2 enhancements and improvements relative to BSIM3v3.1:



An original and accurate charge thickness capacitance model considering the finite charge layer thickness (quantum effects). This model is smooth, continuous and very accurate through all regions of operations.


Improved modeling of C-V characteristics at the weak to strong inversion transition.


Adding the Tox dependence into the threshold voltage (Vth) model.


Adding the flat-band voltage (Vfb) as a new model parameter.


Improved substrate current scalability with channel length.


Restructuring of the non-quasi-static (NQS) model, addition of NQS into the pole-zero analysis and fixing bugs in NQS codes.


Adding temperature dependence into the diode junction capacitance.


DC diode model now supporting a resistance-free diode and current- limiting feature.


Option of using the inversion charge of capMod 0, 1, 2 or 3 to evaluate the BSIM3 thermal noise.


Elimination of the small negative capacitance of Cgs and Cgd in the accumulation-depletion regions.


 Introducing a separate set of channel-width and length dependence parameters (Llc, Lwc, Lwlc, Wlc, Wwc and Wwlc) to calculate Weff and Leff for the C-V model for better fitting of the capacitance data.


 Adding parameter checking to avoid bad values for certain parameters.


 Bug fixes.


New Parameters in BSIM3v3.2

BSIM3v3.2 model has 20 new parameters:


TOXM Gate oxide thickness TOX value at which parameters are extracted.
VFB DC flat-band voltage.
NOFF CV parameter in VgsteffCV for weak to strong inversion region.
VOFFCV CV parameter in VgsteffCV for weak to strong inversion region.
ALPHA1 Substrate current parameter.
ACDE Exponential coefficient for charge thickness in the accumulation and depletion regions.
MOIN Coefficient for the gate-bias dependent surface potential.
TPB Temperature coefficient of PB.
TPBSW Temperature coefficient of PBSW.
TPBSWG Temperature coefficient of PBSWG
TCJ Temperature coefficient of CJ.
TCJSW Temperature coefficient of CJSW.
TCJSWG Temperature coefficient of PBSWG
LLC Coefficient of length dependence for CV channel length offset.
LWC Coefficient of width dependence for CV channel length offset.
LWLC Coefficient of length and width cross-term for CV channel length offset.
WLC Coefficient of length dependence for CV channel width offset.
WWC Coefficient of width dependence for CV channel width offset.
WWLC Coefficient of length and width cross-term for CV channel width offset.


The ALPHA1 parameter is supported in older Silvaco BSIM3 v3.0 and v3.1 Level=8 releases.

The binning option is applied to the VFB, NOFF, VOFFCV, ALPHA1 and MOIN parameters.


Silvaco Improvements in BSIM3v3.2

Impact Ionization Current

The ALPHA0 ALPHA1 and BETA0 parameters define the bulk impact ionization current in all BSIM3v3 versions. However, in BSIM3v3.2 the actual mechanism of the impact ionization current is different compared to that in versions v3.0 and v3.1.

There are two equations in the BSIM3 model, related to the impact ionization current effect.

The first equation calculates the current Iscbe as follows:

Iscbe = Idsa * PSCBE2*diffVd/Leff *

exp(-PSCBE1* Litl/diffVd)


Idsa is the total drain current, including the CLM and DIBL effect currents, PSCBE2 and PSCBE1 are the model parameters,

diffVd = Vds - Vdsat.

Litl is a bias independent parameter computed as a function of TOX and XJ.

The current Iscbe is entirely directed from the drain to the source.

The second equation calculates the current Isub as follows:

Isub = Idsa * (ALPHA0+ALPHA1 * Leff)*diffVd/Leff * exp(-BETA0/diffVd)


ALPHA0, ALPHA1 and BETA0 are the model parameters.

In BSIM3v3.2, the Isub current flows to the bulk from the drain rather than from the source as in versions v3.0 and v3.1.


Impact Ionization Current Partitioning

The partitioning of the impact ionization current between source and drain significantly depends on the channel lengths. In long channel devices 100% of the impact ionization current flows into the bulk. In short channel devices the entire impact ionization current flows into the source.

In BSIM3 versions v3.0 and v3.1, the impact ionization current Isub, flowing from the source to the bulk, does not directly effect the drain current. To model impact ionization current it is necessary to properly select both sets of parameters: PSCBE2 with PSCBE1 and ALPHA0, ALPHA1 with BETA0. The important physical condition is:

Iscbe must be greater than or equal to Isub.

The model parameter IIRAT implemented in SmartSpice versions v3.0 and v3.1 is used to satisfy this condition.

When the IIRAT parameter is explicitly specified in the .MODEL card the values of the model parameters ALPHA0, ALPHA1 and BETA0 will be ignored. These values will be calculated automatically as functions of PSCBE2, PSCBE1 and IIRAT to provide a desired level of the impact ionization current partitioning between the bulk and source of the device.

If IIRAT =0 then the entire impact ionization current will be directed to the bulk of the device (for long channel devices).

If IIRAT =1 then this current will be directed to the source as in Berkeley's default model (for short channel devices).

In BSIM3v3.2, impact ionization current Isub, flowing from the drain to the bulk directly effects the drain current. Now the parameter IIRAT is used to calculate PSCBE2 and PSCBE1 as functions of ALPHA0, ALPHA1, BETA0 and IIRAT.

Figure1 demonstrates the difference between BSIM3v3.2 and v3.1 impact ionization current models. The drain, source and bulk currents are modeled using the same .model card. The parameter PSCBE2, and the current Iscbe are close to zero. The Isub bulk currents represented by dc1.i(vb) and dc2.i(vb) are identical. But drain and source currents are different. The condition Isub <= Iscbe is not satisfied. For this reason, the current Isub is compensated by a non-physical source current dc1.i(vs) in the BSIM3v3.1 model.

Figure 1. Impact ionization currents in BSIM3v3.2 and v3.1 models.


Intrinsic Capacitance Model

UC Berkeley introduced a number of parameters and modified intrinsic capacitance equations to fix problems discussed in [1].The new Version 3.2 capacitance related parameters and modifications are:

CAPMOD=3 - A new intrinsic capacitance model considering the finite charge layer thickness determined by quantum effect.
This model is used as a default instead of CAPMOD=2 used as a default in Version 3.1.
CAPMOD=1,2 - Use a zero-bias flat-band Vfbzb voltage instead of old bias-dependent Vfb. The changes in the BSIM3v3.2 CAPMOD=1,2
models should eliminate "the small negative capacitance of Cgs and Cgd in the accumulation-depletion regions".
VgsteffCV - Was re-implemented using new parameters NOFF and VOFFCV.

The Version 3.2 intrinsic capacitance characteristics are more physical and realistic than in Version 3.1. Fig.1 illustrates improvements in the BSIM3v3.2 CAPMOD=1 capacitance model. This model eliminates negative Cgsb and Cbsb (not Cgdb) in the accumulation-depletion regions.

However, the Berkeley BSIM3v3.2 capacitance models did not reach the level achieved in the Silvaco intrinsic capacitance model implementation verified using Silvaco's Pisces (Atlas) [1].

Figure 1 demonstrates non-physical behavior of the BSIM3v3.2 CAPMOD=1 capacitance model at Vds=0V:

.Transcapacitances @mn2[cgsb], @mn2[cgdb] and @mn2[cbsb] are not equal to zero ( error=100% of the capacitance values in linear region).

.Transcapacitances @mn2[cgsb] and @mn2[cgdb] are not identical in linear region.

For this reason, the parameter INTCAP implemented in the Silvaco Level=8 version v3.0 and v3.1 model was also integrated into the BSIM3v3.2 CAPMOD=1 and 2 capacitance models as an optional parameter. The intrinsic capacitance model invoked by the selector INTCAP fully addresses the problems of the original Berkeley capacitance models.

Non-Quasi Static Capacitance model

UC Berkeley has re-implemented the Non-Quasi Static capacitance model in BSIM3v3.2. This model can be invoked in SmartSpice by specifying the model or device selector NQSMOD=1.

In addition, a new improved Non-Quasi Static capacitance model was implemented in the BSIM3 v3.0, v3.1 and v3.2 Level=8 models. This model can be invoked by specifying the model or device selector NQSMOD=5. It is supported in the .TRAN and .AC analyses. The NQSMOD=5 model is physically consistent with the quasi-static capacitance model.

To model MOSFET devices the NQSMOD=5 model rather than NQSMOD=1 is recommended.

Figure 1 illustrates the difference between the NQSMOD=5 and NQSMOD=1 Non-Quasi Static capacitance models. Their total gate capacitances are represented by cgg_nqsmod1 and cgg_nqsmod5 respectively. The CAPMOD=2 quasi-static capacitance model is represented by cgg_qs. The NQSMOD=5 model is in good agreement with the quasi-static model throughout all regions.


Diodes and Parasitic Resistances

The Berkeley BSIM3v3.2 model has significant enhancements in the diode current and capacitance equations.

The model parameter IJTH is used to linearize the diode exponential characteristics at high positive Vbs or Vds voltage when the diode is on.

The parameters TPB, TPBSW, TPBSWG, TCJ, TCISW and TCISWG can now be used to adjust junction capacitances and built-in potential depending on the circuit temperature.

In the SmartSpice v3.0 and v3.1 implementation the Berkeley older diode equations are not used due to non-physical behavior. In the SmartSpice BSIM3v3.2 implementation the Berkeley v3.2 diode equations and parameters are used as defaults. The SmartSpice generic diode and parasitic resistance equations and parameters are also supported in BSIM3v3.2. They can be invoked by using the geometry parameter calculation selector ACM=1, 2 or 3.

Figure 2. CAPMOD=1 transcapacitances in BSIM3v3.2 and v3.1 at Vds=2V.
(@mn1[cgsb], @mn1[cbsb] and @mn2[cgsb], @mn2[cbsb] represent
BSIM3v3.2 and v3.1 respectively)

Figure 3. CAPMOD=1 transcapacitances in BSIM3v3.2 at Vds=0V

Figure 4. Total gate capacitance for NQSMOD=1 and 5 models



Summary of Silvaco's Improvements

  • Improved Impact Ionization Current
  • Physically Correct Intrinsic Capacitances
  • Physically Correct Non-Quasi Static Model
  • Advanced Parasitics Calculation Methodology


  1. Fundamental Improvements in BSIM3v3.1 Model, Simulation Standard,
    Volume 8, Number 1, January 1997, pp. 3-7.