Simulation of SOI Analog Circuits with SmartSpice

The potential of SOI technology for high frequency and low power applications has attracted much attention. Several SPICE models for simulation of SOI MOSFETs have been developed. SmartSpice supports Honeywell SOI model(HSOI), fully depleted (FSOI) and non-fully depleted (NFSOI) SOI models by University of Florida (Gainesville), and BSIM3SOI from University of California at Berkeley. In this article we concentrate on BSIM3SOI model.

Based on the advanced BSIM3V3 extraction routine of UTMOST III, new extraction strategies have been developed to extract a complete BSIM3SOI model. The extracted model can then be optimized by using global optimization , local optimization, and multi-target rubberbanding features of UTMOST III.

Then, the final model cards can be invoked in SmartSpice to simulate any SOI analog circuit. We have succeeded in simulating a wide range of commonly used analog circuits. SmartSpice was able to provide fast and very accurate results. Several improvements have been made to the original UC-Berkeley BSIM3SOI code to solve convergence problems related to temperature modeling.


Figure 1. SmartSpice simulation result of a 17
stage ring oscillator using the BSIM3SOI model.


Figure 2. SmartSpice simulation result of the
one-shot trigger using the BSIM3SOI model.


Figure 3. SmartSpice simulation result of a two-bit
SOI MOSFET adder using the BSIM3 SOI model.