A Preliminary Analysis of the BSIM3 Version 3 MOSFET Model Using UTMOST


An alpha version of the BSIM3 Version 3 (BSIM3v3) MOSFET model has recently been released by Berkeley. This model claims to have overcome some of the deficiencies inherent in the BSIM3 Version 2 (BSIM3v2) model which was released in March 1994. Continuous predictions of IDS, gm, gds, and their derivatives were not assured by the BSIM3v2 model especially in the moderate-inversion region of device operation. Aside from the difficulties just mentioned, the accuracy and scalability of the BSIM3v2 model were very encouraging. The BSIM3v3 model equations have now been included into UTMOST as a dynamically-linked model [1]. A preliminary comparison of the BSIM3v3 and BSIM3v2 models will be presented in this article. Particular attention will be paid to issues of model continuity and compatibility. Only the DC behavior of the models will be considered here.


Differences Between BSIM3v3 and BSIM3v2

According to Berkeley, BSIM3v3 has a single IDS expression which is valid in all regions of device operation. This is achieved using the concept of effective VGS and VDS voltages [2] which help to ensure continuity of device IDS and its derivatives in the troublesome regions of transition between different modes of device operation. The BSIM3v3 model also includes improved modeling of the channel length and channel width offsets. In addition, the modeling of narrow channel devices should be improved because of the addition of parameters which help to predict observed variations in effective parasitic resistance and bulk charge effects for these devices.

There is no longer a different set of current equations for NMOS and PMOS devices. The BSIM3v3 model is more compatible with the NMOS BSIM3v2 model where the now defunct BULKMOD parameter is set to its default of 1. This will probably mean that the BSIM3 user will have more difficulty with the conversion of PMOS BSIM3v2 parameter sets to analogous PMOS BSIM3v3 parameter sets than with the case of NMOS models. BSIM3v2 to BSIM3v3 model conversion will be the subject of a future Simulation Standard article. Some BSIM3v3 parameter names have been altered from their BSIM3v2 counterparts and some extra parameters have been added to help model effects that were not accurately enough by BSIM3v2.


BSIM3 Comparison Example

In this example a scalable BSIM3v2 model was extracted with UTMOST for NMOS devices from a 0.5µm CMOS process. Figure 1 shows a plot of measured and simulated characteristics for a subset of the devices which were used during the parameter extraction procedure. These devices have drawn W/L dimensions of 20/10µm, 1/10µm, and 20/0.6µm. The model predictions are relatively accurate. It can be seen that the modeling of the linear region IDS-VGS data for the shortest device at non-zero substrate biases is not very good. This was due to the absence of a parameter which would model the length dependence of the BSIM3 UC body-effect mobility degradation parameter, or a parameter which would model the dependence of the parasitic drain and source resistance on substrate bias. This model deficiency is not currently addressed in BSIM3v3 either.

Figure 1. Measured (_____) and simulated (---) device characteristics for
NMOS devices. The BSIM3v2 model was used.

By performing some simple parameter transformations, i.e. changing the DW, DL, NPEAK, PDIBL1, and PDIBL2 parameter names to WINT, LINT, NCH, PDIBLC1, and PDIBLC2 respectively, it was possible to produce a set of predicted BSIM3v3 curves for these same devices. Figure 2 shows the BSIM3v2 curves (continuous lines) from Figure 1 along with the simulated BSIM3v3 curves (broken lines) for the same bias conditions. There is acceptable agreement between the two sets of simulated characteristics. The main differences seem to be due to changes in (a) the definition of saturation voltages, and in (b) the handling of some of the short-channel model parameters which help to determine the threshold voltage. The agreement is further illustrated in Figure 3 which contains simulated IDS-VDS, RDS-VDS, and subthreshold IDS-VGS characteristics for the 20/10µm and 20/0.6µm devices where the same BSIM3v2 and BSIM3v3 models were used.


Figure 2. Simulated BSIM3v2 (_____) and BSIM3v3 (---) IDS-VDSand
IDS-VGS characteristics for NMOS devices.


Figure 3. Simulated BSIM3v2 (_____) and BSIM3v3 (---) IDS-VGS, RDS-VDS,
and subthreshold region IDS-VGS characteristics for NMOS devices.


Next it was decided to compare the BSIM3v2 and BSIM3v3 models in areas where the BSIM3v2 model was known to be defective. Figure 4 contains plots of IDS-VDS and RDS-VDS simulated data for VGS voltages near the moderate-inversion region of operation. The BSIM3v2 curves (continuous lines) exhibit discontinuites for the lower VGS biases used here. These discontinuities have been eliminated by using the BSIM3v3 model. In order to achieve realistic weak-inversion RDS-VDS curves using the BSIM3v3 model it was necessary to set the DELTA parameter to 0.001 rather than to the suggested default value of 0.01. Figure 5 shows weak and moderate-inversion region IDS-VGS and gm/IDS-VGS curves using the same BSIM3 models. The BSIM3v2 model leads to a sharp transition in the gm/IDS characteristics. If care was not taken in the selection of the BSIM3v2 VGHIGH and VGLOW parameters this situation could have been even worse with non-monotonic gm/IDS curves being possible. The BSIM3v3 curves are very well behaved in this moderate-inversion region and the smooth transitions are evident.


Figure 4 Simulated BSIM3v2 (_____) and BSIM3v3 (---) IDS-VDS and RDS-VDS NMOS
characteristics near the moderate-inversion region of operation.


Figure 5 Simulated BSIM3v2 (_____) and BSIM3v3 (---) IDS-VGS and gm/IDS-VGS NMOS
characteristics in the weak and moderate-inversion regions of operation.




The alpha version of the BSIM3v3 model has been included into UTMOST as a dynamically-linked model. A preliminary analysis of this model suggests that some of the more critical deficiencies of the BSIM3v2 model are not apparent with BSIM3v3. The simulated currents and derivatives associated with BSIM3v3 are smooth and continuous in all regions of device operation including the transition regions. It has also been shown that for NMOS devices, or the BULKMOD=1 BSIM3v2 option, there is an acceptable level of compatibility between simulated device characteristics produced by matched BSIM3v2 and BSIM3v3 parameter sets. The BSIM3v3 model library can be linked to the UTMOST 10.10.1 release version. UTMOST users who are interested in evaluating the BSIM3v3alpha model should contact their local SILVACO sales representative or email Seamus Power at seamus@silvaco.com for instructions on how this model can be obtained and linked to their existing version of UTMOST.



SILVACO would like to acknowledge Dr. Yuhua Cheng of the University of California, Berkeley for his contributions during the course of the work described in this article.



[1] Appendix E: Building a Custom Model, UTMOST III Extractions Manual, Volume 3, 1995.
[2] J.A. Power and W.A. Lane, "An Enhanced SPICE MOSFET Model Suitable for Analog Applications," IEEE Trans. on Computer-Aided Design, Vol.11, No.11, Nov. 1992.X-Sun-Content-Length: 0X-Sun-Content-Lines: 0