Silicon has been the material of choice for high-voltage power applications for a long time. Recently silicon-carbide (SiC) and gallium-nitride (GaN) and other materials have started to gain attention. Their wide bandgap means that they should have better performance than silicon. But that wide bandgap also leads to some challenges in TCAD simulation since accuracy needs to be very high. Silvaco uses Delaunay meshing with precision up to 160 bits to achieve the desired simulation accuracy.

The foundation of designing power devices is TCAD. This “virtual manufacturing” is clearly much faster and cheaper than actually running wafers.

3D Trench Oxidation
3D SiC MOS Device Simulation


TCAD on its own would be of limited interest if it could not be linked to the design world. The engineers who design the process for power applications are not the same engineers as design the devices themselves. What is required is a link from TCAD to SPICE so that circuit performance can be measured without having to process real wafers, which is both expensive and slow.

Once SPICE models exist, then design can proceed much like any analog design, with layout being created, parasitics extracted and then simulations run to determine the performance. Mixed mode simulations involving both TCAD and SPICE are also possible. Lather, rinse and repeat.

Another key step is reliability analysis. The high voltages involved make electromigration and thermal issues in particular more critical. Power circuits are also susceptible to high energy particles (single event effects or SEE), single event burnout (SEB) and single event gate rupture (SEGR). In order to increase TCAD runtime efficiency without compromising simulation accuracy it is possible to refine the mesh along the strike path.

Mixed-mode TCAD/SPICE Simulation


Silvaco has a complete suite of tools from TCAD, up through modeling, to get to a PDK. Then a complete suite of tools for design and analysis, including the EM/IR/Thermal analysis technologies recently acquired through the Invarian merger.


  • Silicon, SiC, GaN
  • Wide Bandgap Simulation – physical models, Delaunay Meshing, 80/128/160-bit precision
  • Parallelized PAM Solver (MPI)
  • Mixed-mode TCAD/SPICE Simulation
  • Multi-cell Large Structure Simulation – IGBT current crowding
  • LOCOS Simulation, including Robust Stable 3D Oxidation for Trench Isolation
  • Single Event Burnout (SEB), Single Event Gate Rupture (SEGR), Single Event Effects (SEE), Total Dose
  • Mesh Refinement Along Strike Track
Model Extraction
  • HiSIM_HV2.3 Models
  • TechModeler fast fitting for organic transistors, OLED
Model Extraction
  • Parallel SPICE for high accuracy
  • Full-chip Power IC Simulation with FastSPICE
  • AMS Simulation
  • Transient Noise Analysis
Model Extraction
  • Fast Monte Carlo analysis to save simulation runs
  • Local mismatch analysis
  • Statistical corners for quick design iterations
  • Wide Range of Foundry PDK Support with Emphasis on AMS, HV, BCD Processes
  • Full Custom Layout
  • Integrated Extraction and DRC/LVS
Custom Design
  • Parasitic Reduction
  • Design Analysis
  • Comparison of extracted netlist with parasitics
  • Block to Full-chip Level Analysis
  • Early layout IR/EM analysis
  • SPICE Accuracy
  • Harsh Condition Analysis Using Thermal Capabilities