Industry Standard SOI Model

Advanced Physics-Based Model Equations

BSIM3SOI version 3.2 was released on February 2004.

  • An automatic module for the selection of the operation mode (FD or PD) based on the estimation of Vbs0 is proposed. It can be invoked setting the model parameter SOIMOD=3
  • Flicker noise and thermal noise models are compatible with BSIM4. In addition, gate tunneling induced shot noise and thermal noise due to gate electrode resistance are included

BSIM3SOI version 3.1 model was released on February 2003.

  • An ideal Full-Depletion (FD) module (SOIMOD=2) was provided for the strongly FD SOI devices (without the floating-body effect)
  • The BSIM RF gate resistance model has been provided for SOI devices operated in the high frequency regime
  • An enhanced binning capability has been added

BSIM3SOI version 3.0 model was released on May 2002.

  • A new full-depletion (FD) module has been included to provide better fitting to FD SOI devices. It can be invoked setting the model parameter SOIMOD=1
  • The partially-depletion (PD) module is by default identical to latest version of BSIM3SOI PD version 2.2.3 (also supported in SmartSpice with previous versions setting LEVEL=29). It can be invoked setting the model parameter SOIMOD=0
  • New Gate-to-Channel current (Igc) and new Gate-to-S/D current (Igs and Igd) components were added in this version. By default, these currents are set to 0 in order to stay compatible with previous version but can be accounted setting the new selector IGCMOD to 1

BSIM3SOI version 3 model takes advantages of previous BSIM3SOI version 2 models for partially-depleted and fully-depleted SOI devices. In particular, the following features are supported:

  • Real floating body simulation in both C-V and I-V. The body potential is determined by the balance of all the body current components
  • Enhancements in the threshold voltage and bulk charge formulation of the high positive body bias regime
  • An improved parasitic bipolar current model. This includes enhancements in the various diode leakage components, second order effects (high-level injection & early effect), diffusion charge equation and temperature dependence of the diode junction capacitance
  • An improved impact ionization current model. The contribution from BJT current is also modeled by the parameter FBJTII
  • Instance parameters (PDBCP, PSBCP, AGBCP, AEBCP, NBC) are provided to model the parasitics of devices with various body-contact and isolation structures
  • An external body node (the 6th node) and other improvements are introduced to facilitate the modeling of distributed body-resistance
  • Self-heating: an external temperature node (the 7th node) is supported to facilitate the simulation of thermal coupling among neighboring devices
  • A unique SOI low frequency noise model, including a new excess noise resulting from the floating body effect
  • Width dependence of the body effect is modeled by parameters (K1, K1W1, K1W2)
  • Improved history dependence of the body charges with two new parameters (FRBODY, DLCB)
  • An instance parameter vbsusr is provided for users to set the transient initial condition of the body potential
  • The new-charge thickness capacitance model introduced in BSIM3v3.2, CAPMOD=3, is included
  • New gate-to-body tunneling current, a body halo sheet resistance, a minimum width for thermal resistance calculation and higher limit for exponential functions
  • Better temperature dependence of the oxide tunneling current and an instance parameter FRBODY to account for the layout-dependent distributed body RC effect

Body/Source Built-in potential lowering.
Drain and Source partitions of gate-to-channel tunneling current.

51 stage ring oscillator.
Gate-to-Drain/Source tunneling currents.


Advanced MOSFET Model for Low-Voltage Low-Current Circuit Design

Thin-film Silicon-On-Insulator (SOI) technology is very interesting for low power and low voltage applications such as mobile and portable applications. Due to the growing interest for these applications, SOI becomes increasingly attractive for a future viable VLSI/CMOS technology.

Silvaco Implementation

  • BSIM3SOIv3 MOSFET model can be accessed within SmartSpice or UTMOST III as level 33
  • The implementation is fully compatible with the more recent model description issued by Berkeley university
  • Further speed improvements can be gained through the VZERO option and the multi-threading capabilities
  • The diagnostics option EXPERT is supported in BSIM3SOIv3 to help the designer finding convergence problems
  • Parasitic elements are described using SmartSpice Common Equations
  • Usual MOS device variables like currents, conductances, charges and capacitances as well as BSIM3SOIv3-specific internal variables can be saved, printed, plotted and /or measured
  • SmartSpice supports previous Berkeley BSIM3SOI models, BSIM3SOI PD v2.2.3 (Level=29),BSIM3SOI DD v2.1 (Level=27) and BSIM3SOI FD v2.1 (Level=26)

Rev. 012014_05