The AXI External Bus Interface (EBI) allows the processor to transmit and receive data to an external device, usually a memory (SRAM, Flash, etc.). The number of read wait states, the number of write wait states, and the memory width are all configurable through the APB register interface of the EBI. The EBI allows word, half-word, and byte width addressing to 64-bit, 32-bit, 16-bit, and 8-bit external devices.


  • Interfaces AXI bus to external SRAM or Parallel Flash devices
  • AMBA® AXI Compatible
  • Supports 8bit, 16bit, 32bit and 64bit external modes
  • Supports byte (8bit), halfword (16bit), word (32bit) and dword (64bit) internal accesses
  • Independent programmable wait states per device interface
  • Selects up to 4 external devices


  • Verilog Source
  • Complete Test Environment
  • AXI Bus Functional Model
  • C-Sample Code