The interrupt controller monitors interrupts from all other modules within the system and issues interrupt requests to the processor when necessary. The interrupt controller is scalable to support from 1 to 32 interrupt sources. It also provides enable set and enable clear mechanisms to prevent dangerous read-modify-write operations. It provides active high & active low IRQ & FIQ interrupt request outputs.


  • AMBA® APB Compatible
  • Up to 32 independent interrupt sources
  • FIQ and IRQ outputs
  • Single bit enable and clear control


  • Verilog Source
  • Complete Test Environment
  • AHB Bus Functional Model
  • C-Sample Code