The AHB Lite to AHB Bridge translates an AHB Lite bus transaction (read or write) to an AHB bus transaction.  This is accomplished via a state machine.

In general, AHB Lite is a subset of AHB, so the signaling and implementation of the read or write transactions are the same in both buses.  The main difference between the two bus systems is that AHB can have multiple masters arbitrating for use of the bus, whereas AHB Lite specifies a single master.  The AHB Lite to AHB Bridge allows for an AHB Lite Master to be integrated into a full AHB environment with multiple bus masters.


  • Translates AHBLite transactions to AHB
  • Generates Request/Grant Handshaking
  • Fully Synchronous
  • Useful for interfacing AHBLite CPUs and Masters to a AMBA 2.0 AHB Bus


  • Verilog Source
  • Complete Test Environment
  • AHB Bus Functional Model