2D simulation of large-signal output power for a 180nm PD-SOI NMOSFET

soiex15.in : 2D simulation of large-signal output power for a 180nm PD-SOI NMOSFET

Requires: Victory Process 2D Diffusion & Implantation/Victory Device 2D
Minimum Versions: Victory Process 7.30.4.R, Victory Mesh 1.4.6.R, Victory Device 1.14.1.R

This example demonstrates RF power gain calculation for a 180nm PD-SOI NMOSFET. Note: this is the same device as in the previous soiex14.in example.

First, Victory Process tool is used to build the device structure. The simulated PD-SOI process and devices are described in more detail in the previous soiex14.in example.

2D Device Simulations

A number of different RF device characteristics are simulated using Victory Device

The input deck includes the:

  • Specification of materials, models, and simulation parameters
  • Large-signal transient simulation of RF waveforms with varying amplitudes
  • Large-signal transient simulation of a RF waveform with constant amplitude at different DC operating biases
  • Calculation of input power, output power and power gain for the fundamental frequency and the first four harmonic frequencies
  • Display of the results in TonyPlot

First, a 50 Ohm load resistor is added to the drain electrode using the {CONTACT} statement. A series of large-signal transient simulations with different amplitudes is then performed with vdrain=2V. An input waveform of 1GHz is applied to the gate electrode and a single period is simulated in the time domain. This simulation is repeated with different values of sinusoidal amplitude of the gate. The resulting transient data is then converted to the freqency domain using the FOURIER statement. The FOURIER statement is used to calculate the input power, output power and power gains for the fundamental frequency as well as the first 4 harmonic frequencies. The results are then plotted using TonyPlot .

Finally, a series of large-signal transient simulations with contant amplitude, but varying DC offset is performed. An input waveform of 1GHz is applied to the gate electrode with a fixed amplitude of 0.2V. The single period time domain simulation is repeated for varying values of drain voltage and the resulting transient data is then converted to the freqency domain. The output power as a function of drain voltage is plotting for the fundamental and first 4 harmonic frequencies.

To load and run this example, select the Load button in DeckBuild > Examples. This will copy the input file and any support files to your current working directory. Select the Run button in DeckBuild to execute the example.