LDMOS Breakdown

powerex07.in : LDMOS Breakdown

Requires: SSuprem 4/S-Pisces
Minimum Versions: Athena 5.22.3.R, Atlas 5.28.1.R

This example simulates the fabrication process and breakdown analysis of a Lateral DMOS device (LDMOS). The example shows:

  • Process simulation of the LDMOS structure using Athena
  • Measurement of layer thickness, 1D Vt and BVdss using EXTRACT
  • Auto interface from Athena to Atlas
  • Atlas simulation of the breakdown voltage BVdss

The device simulated is an asymmetric LDMOS power device structure with a 4 micron gate length. Athena simulation starts by defining an asymmetric grid with finer grid in the drift region. In preparation for the gate oxide growth, a sacrificial oxide layer is grown and etched away. A gate oxide of 570 Angstroms is then grown. To ensure adequate grid spacing in the growing oxide, the method grid.ox statement sets the grid to 100 Angstroms. After the oxide growth, the extract statement is used to measure the gate oxide thickness. The results of the EXTRACT can be found in the DeckBuild output window and in the file 'results.final'. Check for this file in the directory in which DeckBuild was started. The next step is a low-energy and low-dose boron Vt-adjust implant. Poly deposition, poly-gate definition and drift region implant are then performed. The drift region is masked and n+ phosphorus is implanted into the opened source and drain areas.

After the final anneal at 1000 degrees the contact holes are opened, metal is deposited and patterned. The four electrodes are then specified.

A useful parameter to measure at this stage is the threshold voltage of a 1D slice through the center of the gate. This is performed via the extract statement. Since the channel length is fairly long and the channel doping is uniform laterally, this is a fairly good approximation to the 2D threshold voltage that Atlas would give. This ends the LDMOS process simulation. The resultant structure file is saved and plotted.

The structure created by Athena will be automatically loaded into Atlas when the command go atlas is reached. The Atlas portion of this example begins by specifying the physical models to be used. For this example, they are cvt: for transverse field dependent mobility, and srh: Shockley-Read-Hall recombination. carriers=2 indicates that both holes and electrons will be simulated. The Selberherr impact ionization model is enabled using the impact selb statement. The contact statement sets the gate workfunction to that of degenerately doped n-type polysilicon. Additionally, the interface statement sets the silicon-silicon dioxide interface charge to 3E10.

The method statement has many purposes. First, it sets the type of solution methodology, as in this case with the newton option. The trap option enables the reduction in applied bias when convergence is not achieved. This is an important feature for large bias steps and simulations near breakdown. The option climit=1e-4 improves convergence for breakdown simulation when the pre-breakdown current is very low. It is recommended for most power device breakdown calculations. Many other options are available. Please consult the Atlas user's manual for additional information.

The sequence of solve statements ramp the drain voltage from zero to 100V. For this particular device, the breakdown voltage is about 50V. At biases higher than this, the simulation will fail to converge. With the trap option enabled, Atlas will automatically reduce the applied bias until the convergence criteria is met or until the maximum number of reductions is reached. The final extract statement reads the maximum drain voltage solved from the output log file. A plot of the Id versus Vds curve in TonyPlot clearly shows the breakdown characteristics. A more sophisticated technique using the curve tracing algorithm in Atlas is also possible. This technique is demonstrated in the Advanced MOS examples section for simulating snapback. Another technique using compliance limits is described in the MOS examples section under the NMOS breakdown.

To load and run this example, select the Load button in DeckBuild > Examples. This will copy the input file and any support files to your current working directory. Select the Run button in DeckBuild to execute the example.