General Current Collapse and Recovery Phenomenon

ganfetex09.in : General Current Collapse and Recovery Phenomenon

Requires: Blaze
Minimum Versions: Atlas 5.28.1.R

This example demonstrates simulation of the "Current Collapse" and "Current Recovery" phenomenon resulting from population and de-population of both un-intentional insulator interface traps and intentional iron (Fe) traps near and under the gate of the GaN FET as a result of Gate to Drain Electric Fields.

The device structure in this example is based on work by Daniel Balaz from his PhD Thesis from University of Glasgow in 2011 entitled "Current collapse and device degradation in AlGaN/GaN heterostructure field effect transistors"

The structure is created using Atlas syntax and the spontaneous and piezo- electric charge concentrations are automatically calculated using the "substrate, polarization and calc.strain" parameters in the region statements.

Substrate leakage current is controlled by a graduated concentration of deep level iron (Fe) acceptor traps located 1eV below the conduction band edge using the doping statement and the key parameter "trap".

The insulator interface traps are created using the "inttrap" statement. For analytical simplicity, only a single level interface acceptor trap, located 0.8eV below the conduction band edge was used. The areal density of the interface traps used in this example, was 2e12/cm2. Using a different energy location in the bandgap for the intentional Fe doping and the un-intentional insulator interface traps, allowed the contribution from both types of trap to be distinguished on the resulting transient I-V curves.

The device is first biased with zero volts on the gate and 5 volts on the drain. After 1 mili-second at this bias, the device is field stressed for only one further milli-second at 25 volts on the drain and -4 volts on the gate. After this short bias stress, the device was returned to it's original bias of zero volts on the gate and 5 volts on the drain.

After only one milli-second of bias stress, the drain current is significantly reduced demonstrating the currnet collapse phenomenon. For completeness, the unstressed bias remained on the device until the traps became de-populated with electrons and the drain current returned to it's original value. Interestingly, it takes over one week for the device to recover ! (6e5 seconds). This very long recovery time may be incorrectly interpreted as device degredation from field induced traps which is an irreversible effect resulting from electric field induced reverse piezo-electric stress.

It will be seen from the transient recovery curve that there are two recovery 'bumps". The first current recovery "bump" at a time of around 30 seconds, is from the re-population of the interface traps and the main recovery at approximately 1e5 seconds, is from the intentionally doped bulk iron (Fe) traps. Obviously a wide distribution of insulastor interface trap energies will "smear out" this initial recovery bump making it difficult to distinguish this individual contribution from the bulk iron traps. That is why a single interface trap energy was selected for this example to clarify the effect on the current recovery curve.

To load and run this example, select the Load button in DeckBuild > Examples. This will copy the input file and any support files to your current working directory. Select the Run button in DeckBuild to execute the example.