Second Breakdown of a MOSFET

esdex05.in : Second Breakdown of a MOSFET

Requires: SSuprem 4/S-Pisces/Giga
Minimum Versions: Athena 5.22.3.R, Atlas 5.28.1.R

In this example, the steady state second breakdown simulation of an NMOS transistor is performed. Second breakdown analysis is an important figure of merit in the understanding of the resistance of devices to high current (voltage) stress caused by the ESD events. This example shows:

  • Formation of a MOS structure in Athena
  • Interface to Atlas
  • Selection of lattice heat flow models
  • Analysis of a non-isothermal IV curve

The MOS structure is constructed using Athena process simulation. This structure is passed to Atlas for HBM test simulation. The NMOS transistor is a 0.8um LDD device using oxide spacers. For a more complete description of the MOS process simulation, see the MOS examples.

The Atlas syntax shows a simple and effective procedure for the tracing of the complicated S-shape I-V characteristics that could be used with any initial NMOS structure.

The Atlas simulation begins with the definition of the models and material parameters of the device. The contact statement is used to define the workfunction of the polysilicon electrode. The material statement is used to define the electron and hole lifetimes in semiconductor.

The physical models used in this simulation reflect the different physical effects important to electrothermal device simulation. The mobility model CVT includes the concentration, electric field and temperature dependencies, as well as a surface mobility degradation effects. In addition to the Shockley-Read-Hall recombination model (SRH), the recombination model AUGER is included to take into account the high injection level effects. Band gap narrowing is taken into account by means of the BGN parameter. The continuity equations for both carriers are selected by default or by using parameter carriers=2 in the METHOD statement. Impact ionization is necessary for any breakdown simulation and it is also included here.

A nonisothermal approach is used, which means that the heat flow equation is solved in addition to the semiconductor equations and all physical parameters become temperature dependent. The syntax models lat.temp enables the solution of the heat flow equation.

In all nonisothermal simulations, the definition of the thermal boundary conditions is very important. Thermal boundary conditions are defined in the thermcontact statement. A value of the thermal conductance determined from the heat conductivity of the substrate is specified at the thermocontact located along the substrate. Thermal isolation is assumed where no thermal contacts are specified. Here, thermal isolation conditions are assumed on the all other surfaces besides the bottom.

To simulate the device second breakdown the curve tracing algorithm was used. For more details of this algorithm and its syntax see the snapback example in the Advanced MOS section.

The steady state current/voltage characteristics are saved in a LOG file. Using TonyPlot it is possible to observe the maximum temperature in the device versus current/voltage. The sharp decrease of the voltage on the nonisothermal I-V curve shows the onset of second breakdown.

To load and run this example, select the Load button in DeckBuild > Examples. This will copy the input file and any support files to your current working directory. Select the Run button in DeckBuild to execute the example.