Simulator Command Entry Window

015_command_entry : Simulator Command Entry Window

Minimum Required Versions: SILOS 4.12.1.C

Example 015_command_entry circuit is a one bit adder implemented as a Verilog gate level design. The schematic consisting of gate level primitives and the Verilog netlist generated by Gateway are shown. The testbench source file contains Verilog behavioral code to generate the input test pattern (but including some errors for only this demo). The SILOS graphical user interface includes the Simulator Command Entry window which can be available from Edit->Preferences->Options menu item , and click Show command line windows checkbox. The command line window will appear at the bottom of the output window.

SILOS Error Messages and Command Line Window

  • Run the project 1bit_adder_err.spjx and check the error message in the output window.
  • In the command line window, type the command ERRORS.
  • Then you can see the detailed error message by the command ERRORS.