Sigma_Delta example

010_sigma_delta : Sigma_Delta example

Minimum Required Version: Harmony 4.12.2.C

This example includes a SPICE top-level testbench , Verilog-A modulator.va an analog Verilog-A file that converts the sinusoidal input signal into a sampled signal and Verilog module to create the digital output signals based on the modulator's output. Additional files used for this project are the SPICE netlist main.in and the connect module BiElecCon.v

Simulate the sigma_delta circuit using Harmony.

  • Start Harmony and open the sigma_delta.spjx project. The Harmony window title will now display <project_path>/sigma_delta.spjx.
  • Run the simulation using the Go toolbar button.
  • Open the Explorer window by selecting View->Explorer to view the circuit hierarchy.
  • Open the Analyzer waveform viewer to view the simulation results.
  • Expand the analog waveforms by right clicking in the signals window and selecting Expand All Analog Signals to view the results.