Mixed-Signal Design Flow Methods

012_core : Mixed-Signal Design Flow Methods

Minimum Required Versions: AccuCore 2.4.9.R, SmartSpice 3.16.12.R

This example explains methods, design flows and commands necessary to utilize AccuCore as and aid to and part of the characterization process for mixed-signal designs.

The .cfg file command SUBCKT_CUT is the primary method of isolating and eliminating analog style content from the SPICE netlist of a mixed-signal design. The use of the .cfg file commands SUBCKT_BLACKBOX, PATTERN_BLACKBOX can also aid in the partition control process of mixed-signal design netlists. In the case of a flat SPICE netlist, the PATTERN_* commands are required.

However, it should be noted that SPICE netlists that contain a combination of flat and hierarchical netlist groups can also be utilized. The netlist need not be a pure flat netlist in the case of RC SPICE netlist extraction. This oversight/design flow limitation is the most common complication faced in handling mixed-signal designs.

The most common cause of netlisting related difficulties are the choice of physical layout design structure imposed. With proper pre-planning the analog and digital portions of the design can be hierarchically isolated in a manner that permits their selective inclusion in the netlisting process even if finely integrated together for performance, area or simulation verification purposes.

It should be noted that analogcircuits, for AccuCell/AccuCore purposes, means ANY circuit for which boolean switch network structure logical decomposition analysis fails to identify the functional behavior of the circuit. Cells that have logic function equivalents, but do not operate rail-to-rail or utilize differential pair common mode functionality, feedback, oscillatory behavior or other pseudo-analog like behaviors are not considered suitable digital circuits.

SILVACOs HIPEX-NET and HIPEX-RC can perform selective LVS and RC netlist extraction that can aid the AccuCore partitioning process. It should also be noted that AccuCore contains no inherent limitation in being able to run SPICE characterization simulations of portions of the design that include analog content if the proper precautions and netlist management limitations are adhered to.

The critical requirement is that the analog content is COMPLETELY contained within the partitioned object to be characterized as a cell. The only exception circuitry that generates voltage bias nodes which can be emulated by additional reference supplies. If proper care is take even current source nodes that can be thevenin equivalently replaced can be handled.

The only additional requirement is that the cell object be either simple enough to be properly functionally represented by EITHER a .eqn function definition (or a .tbl table vector definition) file to avoid function extraction difficulties OR a blackbox statement and characterized separately in AccuCell.

It should be noted that the main difference between the use of the SUBCKT_CUT, SUBCKT_BLACKBOX commands is the resulting impact to the remaining circuits cauterization conditions as relates to node loading effects and to some degree alternate slope value definition in lieu of the actual values that the circuit would have otherwise provided during the characterization process of adjacent gates.

SUBCKT_CUT completely removes the defined circuits PRIOR to internal netlisting and the subsequent characterization process. Where as SUBCKT_BLACKBOX, PATTERN_BLACKBOX retain the defined circuits for loading and slope purposes, but otherwise ignore them for all other purposes.

If suitable alternate circuit modeling and is performed to the netlist prior to input into AccuCore suitable equivalent results can be obtained as if the defined analog circuits remained in the original netlist. This is the best option and should be considered if at all possible.