SURGE Silicon Valley

Silvaco announces the launch of a Silvaco Users Seminar at various Silvaco sites in 2018.

SURGE (Silvaco UseRs Global Event) is a showcase and unique event that brings together TCAD, EDA as well as the IP communities to discuss new technologies, smart integration for innovative applications and new techniques for realizing advanced designs.

  • Unique variety of technical presentations
  • Roadmap presentations and exciting technology updates
  • Dynamic panel discussions and executive keynotes
  • Networking opportunities with industry experts
Fun Prizes

Silvaco US will be hosting SURGE on October 9, 2018.

Time:

  • October 9, 2018 12:30 - 9pm

Venue:

  • Santa Clara Marriott
  • 2700 Mission College Boulevard
  • Santa Clara, CA 95054


Agenda

Time
12:30PM Registration
1:15PM Welcome Address - Thomas Blaesi
1:20PM Technology Behind the Chip - David L. Dutton
1:40PM The State of the Semiconductor Industry - Jim Feldhan President, Semico Research
2:10PM Materials Enabled System Innovations
Blessy Alexander - Director of Design Technology, Applied Materials
There is broad consensus that AI is one of the most exciting and pervasive inflections to happen in our lifetime. While many innovations helped solve challenges during the PC and mobile eras, AI is challenging the entire design ecosystem – from materials to systems – in a way that we haven’t experienced before. With the slow-down of Moore’s law, the industry is scrambling to find the next big innovation to meet the demands of these AI systems. In this talk, Blessy will discuss the key role played by innovations in materials and more importantly, the connectivity of materials to systems to drive the next generation of designs.

Time EDA Track
2:45PM Smart Silicon Solutions - Ole Andersen
3:15PM Trusted High-Sigma Variation Analysis with VarMan™ - Firas Mohamed
3:45PM The Benefits Of Using Jivaro™ For Parasitic Reduction
Nemani Viswateja - CAD Engineer, Intel and Jean-Pierre Goujon
Following recent work on advanced nodes, understand how Jivaro and Viso had worked together to find an innovative solution to speed up simulation of parasitic extracted designs
4:15PM Coffee Break
4:30PM Characterization Solutions And Services For Standard Cells And IO - Jens Michelsen
5:00PM Standard Cell Library optimization with Cello™ - Guilherme Schlinker
In this presentation we will discuss a methodology and techniques for optimizing standard cell library layouts for area, power, speed and yield. Foundries and IP vendors typically provide one-size-fits-all generic library IP, exploring few variables such as VT implant and track height. By exploring other dimensions such as tapered cells, stacked transistors and fine-grained transistor sizing the designer can customize and achieve a considerable improvement with an optimized library. We will also present Cello(TM), Silvaco’s platform for standard cell layout design and optimization, and Silvaco’s standard cell IP services.
5:30PM Designing High Speed Analog Interface Blocks With Expert™
Brian Bradburn

Time TCAD Track
2:45PM From TCAD to Sign-Off - Eric Guichard
3:15PM Atomistic Device Simulations
Tillmann Kubis - Purdue University
3:45PM TCAD for Display Applications - Derek Kimpton
4:15PM Coffee Break
4:30PM Performance Improvements For Advanced Physical Etching And Deposition In Memory Technologies - Paul Manstetten
We will explain and illustrate the impact of recently developed methods to reduce the runtime of physically based etching simulations, like the simulation of an ion beam etching process applied on a magnetic tunnel junction (MTJ) stack.
5:00PM Advancements In Annealing And Oxidation Steps For Compound Semiconductor Power Devices - Vito Simonka
Silicon carbide (SiC) and gallium nitride (GaN) are attractive candidates to replace traditional silicon, particularly in power electronics, in order to improve device properties and reduce internal device losses. The advantageous properties of these wide bandgap semiconductors are promising higher energy efficiencies and at the same time higher operating temperatures, frequencies, and voltages. However, the development of novel electron devices requires a continuous support by process and device simulations in order to improve electrical properties and to reduce production costs. Significant to that is the ability to be able to accurately predict dopant activation and thermal oxidation processes, therefore, novel modeling approaches of annealing and oxidation processes have been recently developed. Our modeling approaches augment process simulations with accurate predictions of dopant activation ratios in SiC and GaN for various annealing temperatures and total implanted concentrations. In addition, extensions of SiC oxidation models have been developed, which provide accurate predictions of oxide thicknesses for arbitrary device structures and orientations, while at the same time enable three-dimensional simulations. To sum up, this work provides a new understanding of the activation and oxidation mechanisms, promotes the advancement of SiC and GaN semiconductor technology, and, finally, enables to advance technology computer-aided design tools with novel modeling and simulation capabilities for oxidation and post-implantation annealing processes.
5:30PM TechModeler and SPICE Model Generation Services - Bogdan Tudor

Time IP Track
2:45PM IP – The Lifeblood of SoC Design Today
Babak Taheri
The complexity of SoC design has reached the point where no company can afford to complete such a design without purchasing third-party IP. Babak will talk about the nature of the IP market today, how we got here, and where Silvaco as an emerging player in the semiconductor IP market is headed.
3:15PM Compute Acceleration Using Silvaco RTL IP on eFPGA
Tony Kozaczuk - Director, Solutions Architecture, FlexLogix
EFLX eFPGAs offer reconfigurability to SOCs to meet the demands of rapidly changing market requirements. EFLX eFPGA as accelerators offers more flexibility over fixed-function accelerators in SOCs. Silvaco IP running on EFLX as accelerators offers 30x – 1000x higher performance than running the same function on an ARM Cortex M0.
3:45PM Using IAR Systems Software Tools To Accelerate The Integration of Silvaco’s Arm-based Subsystems
Zulfi Zamindar - Field Application Engineer, IAR Systems Software Inc.
Learn how SoC designers developing with Silvaco IP subsystem can overcome challenges such as system component integration, code complexity and optimizations to produce high quality systems using IAR Embedded Workbench from IAR Systems. IAR Embedded Workbench includes comprehensive debugging capabilities and fully-integrated analysis tools that will help designers bring up SoC platforms quickly and reliably. IAR Embedded Workbench also plays a key role in how to get the best out of the hardware to reduce the overall system cost, enabling you to speed time to market and create innovative platforms that will differentiate your end products. In addition, the session will explore solutions to ensure security in your code structure.
4:15PM Coffee Break
4:30PM Jumpstarting Your SoC Design Using Arm DesignStart And Silvaco IP
Joe Hanson, Sr. Channel Manager, Americas, Arm
Creating custom system-on-a-chip (SoC) devices is all about differentiation, reducing costs and getting your product to market as quickly as possible. Arm’s DesignStart program provides low-cost, instant access to Arm CPUs and IP. Silvaco provides Subsystems / Platforms pre- integrated with the CPUs, interconnect and the Silvaco IP peripherals and cores. This presentation will describe how the Arm DesignStart and Silvaco SubSystems will jump-start your low-power, higher performance, or I3C sensor applications SoC development.
5:00PM Higher Performance And Lower Power Consumption For IoT Devices
Bård Pedersen - Adesto Technologies
As demand for higher performance, lower power consumption and lower cost continues at a relentless pace, system designers find that the existing embedded solutions no longer meet their requirements. Switching from embedded flash or SRAM to eXecute-in-Place (XiP) technology holds a great deal of promise for small embedded systems, but this change comes with its own set of design challenges.

This presentation will present a new approach for designing an XiP-based system and how this approach handles the performance and cost issues associated with existing MCUs and Flash devices. XiP does not suffer from the disadvantages of executing from on-chip embedded Flash or SRAM. Unlike embedded flash, with XiP the MCU can be implemented with the latest process technologies leading to better power consumption, higher frequency and lower system cost. Unlike embedded SRAM, an XiP Flash device can be turned off such that it won’t consume any power during power-down modes. But as many designers know, building a system with an XiP Flash requires solving some key challenges in terms of performance and system cost. Older SPI devices had a serial interface that could supply instructions at a rate that sufficed for only the lowest end MCUs. And while advances in the SPI protocol which led to the introduction of Quad devices operating in Dual-Data-rate (DDR) enabled somewhat higher levels of performance, it’s still a concern. System cost is also an issue, especially in devices that require firmware updates. This presentation will present a new approach for designing a XiP-based system and how this approach handles the performance and the cost issues associated with existing MCUs and Flash devices.
5:30PM Using Silvaco's foundation IP for Standard Cells - Jens Michelsen

Time Session End
6:10PM Closing Remarks And Networking (Happy Hour)

*Sessions and times are subject to change without notice.

Surge Highlights:

Thomas Blaesi
Welcome Presentation Thomas F. Blaesi
Vice President, Global Marketing, Silvaco, Inc.


Thomas F. Blaesi is Vice President of the global marketing group, which is chartered with defining, driving, and promoting Silvaco’s leadership in the TCAD, EDA and IP market. Key areas of responsibility include strategic planning, corporate marketing, product marketing, market research, brand management, corporate communications, and ecosystem alliance programs.

Thomas joined Silvaco in October 2017 with more than 25 years of experience in corporate strategy, business development, and marketing in semiconductor, and electronic design automation industries. He has led major projects in SoC platform-based design, system-level design, and design for manufacturing in addition to hands-on experience in custom and semi-custom chip design and development.

Most recently, Thomas was the managing partner at Zeema Technologies. Before that, he served as CEO of Chipvision, and held various senior business and technical positions at Cadence, Synopsys, and LSI Logic.

Thomas holds a BS in electrical engineering and computer science from Hochschule Furtwangen University, Germany.

David L. Dutton
Smart Silicon Solutions from Silvaco David L. Dutton
CEO, Silvaco, Inc.

David L. Dutton serves as Chief Executive Officer of Silvaco and is also a member of the company’s Board of Directors. He has also served as an advisory board director of solar company Sunpreme since 2013 and LED manufacturer Glo since 2014. Dutton serves as managing principal of business management consulting firms SemiEnergy and CEO to CEO and was an active member of the Silicon Valley Leadership Group and the Alliance of Chief Executives.


From 2001 to 2013, Dutton served as President, CEO and board director member of Mattson Technology, where he led the company's turnaround to profitability and quadruped the company's total available market by expanding into new semiconductor and clean tech capital equipment markets. Prior to joining Mattson, Dutton held management, engineering and product positions at Silicon Valley technology companies, including Intel and Maxim Integrated Products. Dutton holds a B.S. in Geology from San Jose State University.

Jim Feldhan
The State of the Semiconductor Industry Jim Feldhan
President, Semico Research

Jim Feldhan founded Semico Research in 1994. A 20-year veteran of the semiconductor industry, he brings his management, forecasting and modeling expertise to Semico, along with a reputation of quality research. Jim designed and developed the research methodologies and report structures,which are the basis for Semico's Custom Research and Portfolio Services. Jim also develops Semico's overall economic outlook as well as performing various semiconductor consulting and forecasting. With a focus on quality, Semico Research has grown to the largest semiconductor-focused consulting and research firm.

Jim was formerly the Executive Vice-President and General Manager at In-Stat as a member of the start-up team.

Blessy Alexander
Materials Enabled System Innovations Blessy Alexander
Director of Design Technology, Applied Materials

Blessy Alexander started her career as a Memory Logic designer for Server class synchronous memory interface at IBM, Systems and Technology Group. She later moved onto become the lead for storage and RAID controller chips, eventually moving to a Senior Manager role in charge of full concept to system ship for the Flash RAID controller ASICS on IBM servers. While at IBM, she drove definition of new newly emerging CAPI protocol for key ASICs. After nearly a decade at IBM, she moved to Synopsys to establish an Interface IP Application Engineering team supporting key worldwide customers. As part of this role, she helped developed the IP subsystem services model and enabled new high revenue channels. Currently, as a Director of Design Technology at Applied Materials, she is enabling emerging technology development and maturity, driven by the Materials-to-Systems model with a particular focus on overcoming AI Hardware challenges in memory and packaging.

Eric Guichard
From TCAD to Sign-Off Dr. Eric Guichard
Vice President of the TCAD Division, Silvaco, Inc.

Dr. Eric Guichard is Vice President of Silvaco’s TCAD Division. He is responsible for managing all aspects of the TCAD division from R&D to field operations.


Tillmann Kubis
Atomistic Device Simulations Tillmann Kubis
Purdue University
Tillmann Kubis received the Ph.D. degree in physics from the Technische Universität München, Munich, Germany, in 2009. He is currently a Research Faculty with Purdue University, West Lafayette, IN, USA. His research interests include the high performance implementation of the nonequilibrium Green’s function method and its expansion into new physics and new application spaces. He is leading the development of the NEMO tool suite including the NEMO5 multipurpose nanodevice simulation tool that embraces most of his latest quantum transport method developments.

Dr. Derek Kimpton
TCAD for Display Applications Dr. Derek Kimpton
Principal Applications Engineer, Silvaco, Inc.
Dr. Derek Kimpton, Principal Applications Engineer at Silvaco, spent four years characterizing radiation effects on devices at Plessey Semiconductors in Lincoln, England. Whilst there he published the paper in Solid-State Electronics on a new and predictive total dose oxide charging model, that is the basis for the code implemented in Silvaco's latest TCAD Victory Device simulator.

Prior to his over 17 years at Silvaco, Dr. Kimpton received both a B.Sc. in Electronics and Ph.D. in GaInAs MOSFET fabrication from Kings College, London with an industrial year in the Optical Fiber division at GEC Hirst Research Center, in England. He also worked on the synthesis of silicon germanium (SiGe) by implantation of germanium as a Research Fellow at Middlesex University, England.

Paul Manstetten
Performance Improvements For Advanced Physical Etching And Deposition In Memory Technologies Dr. Paul Manstetten
Paul Manstetten was born in 1984 in Berlin, Germany. He studied Mechatronics at the University of Applied Sciences Regensburg (Dipl.-Ing.) and Computational Engineering at the University of Erlangen-Nuremberg (MSc). After three years as an application engineer for optical simulations at OSRAM Opto Semiconductors in Regensburg he joined the Institute for Microelectronics at the TU Wien in 2015 as a project assistant. He finished his PhD studies (Dr.techn.) in 2018 and now works as a postdoctoral researcher on high performance methods for semiconductor process simulation.

Vito Šimonka
Advancements In Annealing And Oxidation Steps For Compound Semiconductor Power Devices Vito Šimonka
Application Engineer, Silvaco, Inc.
Vito Šimonka was born in Murska Sobota, Slovenia in 1991. He received Dipl. Fiz. (UN) and Mag. Fiz. degree in physics from the University of Maribor, Slovenia in 2009 and 2015, respectively. He graduated magna cum laude and received the Best Student Award of the University of Maribor in 2015 due to his research achievements in the field of computational physics. He was additionally awarded with the Zois Scholarship from the Public Fund of Slovenia for Excellence in 2012, the PRACE Summer of HPC Ambassador Award in 2013, and the Rectors Award of the University of Maribor in 2017.

Currently, Vito is a doctoral student at the Institute for Microelectronics, TU Wien, Austria, working on the development of process TCAD solutions and modeling of wide bandgap semiconductors. His research contributions include extensions of the silicon carbide oxidation models for three-dimensional simulations, dopant activation models for implanted silicon carbide and gallium nitride, and investigations of various semiconductor devices, in particular power diodes, rectifiers, and field-effect transistors.

Dr Bogdan Tudor
TechModeler and Spice Model Generation Services Dr. Bogdan Tudor
Senior Manager, Device Characterization, Silvaco, Inc.

Bogdan Tudor is Head of Device Characterization for Silvaco, leading the UTMOST and Modeling Service teams. He has over 20 years of experience in model development and characterization software.


Babek Taheri
IP – The Lifeblood of SoC Design Today Babak Taheri
CTO and EVP of Products, Silvaco, Inc.

Babak Taheri is the CTO and EVP of products at Silvaco, a leading EDA Software Company. He manages the TCAD, EDA and IP product divisions at Silvaco. Previously, he was the CEO / president of IBT working with investors, private equity firms, and startups on M&A, technology, and business diligence. While at IBT, he served on advisory boards of MEMS World Summit, Novasentis, AGCM, ALEA labs, Lion Point Capital, and Silver Lake.

Prior to IBT, he was the VP & GM of the sensor solutions division at Freescale semiconductor (now NXP). He also held VP/GM roles at Cypress Semiconductors, Invensense (now TDK) and key roles at SRI International and Apple. He received his Ph.D. in biomedical engineering from UC Davis with majors in EECS and Neurosciences, has over 20 published articles and holds 28 issued patents.

Tony Kozaczuk
Compute Acceleration Using Silvaco RTL IP on eFPGA Tony Kozaczuk
Director, Solutions Architecture, Flex Logix
Tony Kozaczuk is the Director of Solutions Architecture at Flex Logix. Tony's team's role at Flex Logix is to provide support to customers to evaluate architectural alternatives for using EFLX to achieve the best result. Over twenty years Architecting systems and ICs at National, Sun and Intel. Most recently at Intel, Tony was Lead System Architect for multiple generations of Intel CPU Cores, and led system clocking architecture for all client systems. At Sun, Tony was Lead System Architect for several servers and workstations and led I/O architecture and microarchitecture of several systems and chips. He holds a BSEE from San Francisco State University.

Zulfi Zamindar
Using IAR Systems Software Tools To Accelerate The Integration of Silvaco’s Arm-based Subsystems Zulfi Zamindar
Field Application Engineer, IAR Systems Software Inc.
Responsible for the US West region, Zulfi holds a B.S., Electrical Engineering degree and a MBA, General Management degree. With 20 years of semiconductor experience supporting start-ups to original equipment manufacturers, Zulfi has extensive experience in multi-core ARM Cortex microcontroller and ARM v8 processors, Ethernet PHYs, Ethernet Switches, PCIe Switches, FPGAs, and Embedded RTOS.

Brian Bradburn
Designing High Speed Analog Interface Blocks With Expert™ Brian Bradburn
Head of EDA, Front-End/Back-End, Silvaco, Inc.

Brian Bradburn is Head of Silvaco's EDA product group, driving the design, development and vision of the front-end and back-end flow of products.


Guilherme Schlinker
Standard Cell Layout Optimization With Cello™ Guilherme Schlinker
Director of Layout Automation, Silvaco, Inc.

Guilherme Schlinker is Director of Layout Automation at Silvaco. He is responsible for Silvaco’s Layout Optimizer Product Line. Prior to joining Silvaco in 2018 he worked for 12 years at Nangate, where he developed EDA tools for layout automation and delivered standard cell library IP for multiple foundries and technology nodes. He joined Silvaco as part of the acquisition of Nangate and continues working with the former Nangate products. Mr. Schlinker holds a Computer Engineering degree from Universidade Federal do Rio Grande do Sul, Brazil.

Firas Mohamed
Trusted High-Sigma Variation Analysis with VarMan™ Dr. Firas Mohamed
Head of Flow Optimization General Manager, Silvaco France

Dr Firas is General Manager of Silvaco France. He is Head of process variability and netlist reduction products line. Firas has over twenty three years experience in EDA industry.


Jean-Pierre Goujon
The Benefits Of Using Jivaro™ For Parasitic Reduction Jean-Pierre Goujon
Application Manager, Silvaco, Inc.
Mr. Jean-Pierre Goujon is Application Manager for Silvaco France. He is responsible for customer technical support for EDA products, with a specific interest in parasitic analysis and reduction products. Prior to this position, he has been AE manager for Edxact for 12 years and had various AE responsibilities at Cadence, Simplex and Snaketech mostly in the field of parasitic extraction.

Mr. Goujon holds a BSc in EEE from Robert Gordon University, Aberdeen, UK and a MS in EEE from Ecole Supérieure de Chimie, Physique, Electronique de Lyon, France.

JNemani Viswateja
The Benefits Of Using Jivaro™ For Parasitic Reduction Nemani, Viswateja
CAD Engineer, Intel
Viswateja has been a CAD Engineer at Intel PSG since 2015. He is currently the Parasitic Extraction lead for PSG San Jose team and works on defining extraction methodologies and flows for various advanced process nodes. He has held internship positions at Nvidia &amm; Real Intent where he found his passion for Design Automation & EDA development.

Viswateja graduated from San Jose State University with a MSEE in 2015. While at SJSU, he worked on a research project in collaboration with Volkswagen to implement real time image matching applications in Autonomous vehicles by using FPGA based hardware accelerators. He is originally from Bangalore, India and holds a Bachelors in Electronics and Communications from Visvesvaraya Technological University which served as a foundation for his interest in the field of semiconductor engineering.He has been a member of SJSU IEEE student chapter and continues to be a professional IEEE member.

Ole Andersen
Smart Silicon Solutions Ole Christian Andersen
GM - EDA Business Unit, Silvaco, Inc.
Mr. Andersen held the position of Vice President and General Manager of Vitesse Semiconductors – Ethernet Products Division. Before joining Vitesse, he served as CEO of Exbit Technology, a Danish company he founded in 1999. Exbit Technology was acquired by Vitesse in 2001. From 1997 to 1999, he worked for Intel Corporation in Denmark as Engineering Manager for the switch IC group. From 1994 to 1997, he worked for Cray Communications in Denmark, heading up the switch IC group. He was part of the team that headed Cray’s sales effort to Intel in 1997. Prior to joining Cray Communications, Mr. Andersen worked with EDA research and full-custom IC design for 4 years at the Technical University of Denmark and DELTA Electronics. Mr. Andersen received his M.Sc.EE from the Technical University of Denmark, and has a B.Sc in Economics and Business Administration from the Copenhagen Business School.

Joe Hanson
Jumpstarting Your SoC Design Using Arm DesignStart And Silvaco IP Joe Hanson
Sr. Channel Manager, Americas, Arm
Joe Hanson has over 30 years of semi-conductor and embedded systems experience. He is currently Sr. Manager of Channel Sales at Arm. He is responsible the Arm Approved Design Partners program, a global network of design service companies endorsed by Arm. His early career focused on developing real-time data acquisition systems in biomedical applications and audio playback controllers for the IMAX theaters. He joined Altera in 1996 holding a variety of marketing, technical marketing and application roles. In 2004, Mr. Hanson joined Stretch – a provider of embedded video processing solutions. He holds 4 patents. Mr. Hanson holds a B.S in Biological Sciences from Florida State University and a B.S. in Electrical Engineering from the University of Alabama at Birmingham.

Bård M. Pedersen
Higher Performance And Lower Power Consumption For IoT Devices Bård Pedersen
Adesto Technologies
Bård M. Pedersen has over 20 years of experience in the electronic systems and semiconductor industries. He is Director of Technology at Adesto Technologies. He is responsible for technology development and new product definitions and has also been responsible for technical marketing, reference designs and applications support.

His technical expertise includes non-volatile memories, microcontroller based embedded systems, analog, digital and mixed signal design, LED drivers, design for EMC compatibility and embedded software development. More than a decade in applications design and support has made him an ardent problem solver.

Bård received his Master’s degree in Electrical Engineering from the Norwegian Institute of Technology (NTNU), Norway.

Jens C. Michelsen
Characterization Solutions and Services for Standard Cells and IO Jens C. Michelsen
Director Biz Dev, Silvaco, Inc.
Mr. Michelsen was Director of Physical Design at Vitesse’s Ethernet Products Division. Before joining Vitesse, he served as Physical Design Manager of Exbit Technology. Mr. Michelsen has more than 15 years’ industry experience within leading companies including Intel, Olicom and GN Nettest, in areas ranging from mathematical modeling to physical design. In recent years, physical design and design flow to tapeout have been his main focus. He holds several US patents in communications and IC design.