SURGE Herzliya

Silvaco announces the launch of a Silvaco Users Seminar at various Silvaco sites in 2018.

SURGE (Silvaco UseRs Global Event) is a premier and unique event that brings together both the EDA as well as the IP community to discuss new technologies, smart integration for innovative applications and new techniques for realizing advanced designs.

  • Unique variety of technical presentations
  • Roadmap presentations and exciting technology updates
  • Networking opportunities with industry experts
Fun Prizes

Silvaco will be hosting SURGE on November 28, 2018. Please save the date. We will be in touch with details on the sessions and tracks including information on our keynote speaker.

Time:

  • November 28, 2018

Venue:

  • Dan Accadia Herzliya Hotel  
  • Ramat Yam St 122
  • Hertsliya, 46851, Israel



Be sure to stay for the network hour for a chance to pick up some great prizes!


Agenda

Time
12:00 - 13:00 Lite Lunch Registration
13:00 - 13:05 Welcome Address - Adi Katav Sales - Silvaco Israel
13:05 - 13:40 Technology Behind the Chip - Thomas Blaesi VP Marketing, Silvaco
13:40 - 14:20 From TCAD To Sign-off - Dr. David Green Senior Development Engineer, Silvaco
14:20 - 14:50 The Benefits of Using Jivaro™ For Parasitic Reduction
Simon-Alexis Abric - AE, Silvaco
14:50 - 15:05 Coffee Break
15:05 - 15:35 Trusted High-Sigma Variation Analysis with VarMan™ - Dr. Jean Baptiste Duluc Senior AE, Silvaco
15:35 - 16:15 Standard Cell Library Characterization and Optimization With Viola™ and Cello™ - Jens Michelsen Director Business Development, Silvaco
16:15 - 16:45 Using Silvaco's Foundation IP for Standard Cells - Jens Michelsen Director Business Development, Silvaco
16:45-17:15 IP – The Lifeblood of SoC Design Today - Thomas Blaesi VP Marketing, Silvaco
17:15 Cocktails and Dinner With Prize Drawing

*Sessions and times are subject to change without notice.

Surge Highlights:

Abi Katav
Welcome Address Avi Katav
Sales, Silvaco, Israel

Adi Katav is specialized in hi-tech market and semiconductor and represent Silvaco activates in Israel. Mr. Katav graduated as BS.c.ee and Marketing Management MA. Mr. Katav is providing professional business development in hi-tech world-wide form more than 20 years.

Thomas Blaesi
Technology Behind the Chip Thomas Blaesi
Vice President, Global Marketing, Silvaco, Inc.
Thomas F. Blaesi is Vice President of the global marketing group, which is chartered with defining, driving, and promoting Silvaco’s leadership in the TCAD, EDA and IP market. Key areas of responsibility include strategic planning, corporate marketing, product marketing, market research, brand management, corporate communications, and ecosystem alliance programs.

Thomas joined Silvaco in October 2017 with more than 25 years of experience in corporate strategy, business development, and marketing in semiconductor, and electronic design automation industries. He has led major projects in SoC platform-based design, system-level design, and design for manufacturing in addition to hands-on experience in custom and semi-custom chip design and development.

Most recently, Thomas was the managing partner at Zeema Technologies. Before that, he served as CEO of Chipvision, and held various senior business and technical positions at Cadence, Synopsys, and LSI Logic.

Thomas holds a BS in electrical engineering and computer science from Hochschule Furtwangen University, Germany.


David Green
From TCAD to Sign-Off Dr. David Green
Senior Development Engineer, Silvaco, Inc.


Simon-Alexis Abric
The Benefits Of Using Jivaro™ For Parasitic Reduction Simon-Alexis Abric
Application Engineer, Silvaco, Inc.

Dr. Jean Baptiste Duluc
Trusted High-Sigma Variation Analysis with VarMan™ Dr. Jean Baptiste Duluc
Senior Application Engineer, Silvaco France
Dr. Jean Baptiste Duluc is the core-competency application engineer in charge of VarMan product development at Silvaco. He joined Silvaco in 1999 as support engineer for the characterization and modeling software Utmost. Then, at the research center, he leads projects in the new generation of characterization and modeling application, Utmost IV, and statistical model generation tool, Spayn. His PhD work was focused on process variation impacts on figure of merits of integrated circuits.

Dr. Duluc holds a MS and PhD in microelectronics from the University of Bordeaux, France.

Jens C. Michelsen
Standard Cell Library Characterization and Optimization With Viola™ and Cello™ Jens C. Michelsen
Director Biz Dev, Silvaco, Inc.
Mr. Michelsen was Director of Physical Design at Vitesse’s Ethernet Products Division. Before joining Vitesse, he served as Physical Design Manager of Exbit Technology. Mr. Michelsen has more than 15 years’ industry experience within leading companies including Intel, Olicom and GN Nettest, in areas ranging from mathematical modeling to physical design. In recent years, physical design and design flow to tapeout have been his main focus. He holds several US patents in communications and IC design.

Jens C. Michelsen
Using Silvaco's Foundation IP for Standard Cells Jens C. Michelsen
Director Biz Dev, Silvaco, Inc.
Mr. Michelsen was Director of Physical Design at Vitesse’s Ethernet Products Division. Before joining Vitesse, he served as Physical Design Manager of Exbit Technology. Mr. Michelsen has more than 15 years’ industry experience within leading companies including Intel, Olicom and GN Nettest, in areas ranging from mathematical modeling to physical design. In recent years, physical design and design flow to tapeout have been his main focus. He holds several US patents in communications and IC design.

Thomas Blaesi
IP – The Lifeblood of SoC Design Today Thomas F. Blaesi
Vice President, Global Marketing, Silvaco, Inc.

Thomas F. Blaesi is Vice President of the global marketing group, which is chartered with defining, driving, and promoting Silvaco’s leadership in the TCAD, EDA and IP market. Key areas of responsibility include strategic planning, corporate marketing, product marketing, market research, brand management, corporate communications, and ecosystem alliance programs.

Thomas joined Silvaco in October 2017 with more than 25 years of experience in corporate strategy, business development, and marketing in semiconductor, and electronic design automation industries. He has led major projects in SoC platform-based design, system-level design, and design for manufacturing in addition to hands-on experience in custom and semi-custom chip design and development.

Most recently, Thomas was the managing partner at Zeema Technologies. Before that, he served as CEO of Chipvision, and held various senior business and technical positions at Cadence, Synopsys, and LSI Logic.

Thomas holds a BS in electrical engineering and computer science from Hochschule Furtwangen University, Germany.