Physical 3D Single Event Upset Simulation of a SRAM Cell
with VICTORY DEVICE and SmartSpice

 

1. Introduction

VICTORY DEVICE simulation framework includes tools for 1D, 2D and 3D simulation of modern semiconductor technologies. VICTORY DEVICE implements a full tetrahedral meshing engine for fast and accurate simulation of complex 3D geometries. Built in and user defined mesh refinement criteria can be used for customization of the mesh during a simulation. This is the case for Single Event Upset (SEU) simulation. The simulation of SEU phenomena in 3D structures is highly complicated due to the presence of large gradients in physical quantities near the SEU track. In order to perform accurate and stable simulations of SEU strikes in 3D structures, it is essential to have fairly dense mesh near the center of the SEU track while maintaining a coarser mesh far from the track for efficiency. The aim of this paper is to illustrate how a SRAM cell subject to SEU can be accurately simulated.

 

2. Creation of the Structure

A schematic diagram of a 4 transistor SRAM circuit is shown in Figure 1. The 4 transistors are used for numerical device simulation, thus all the coupling effects between transistors are taken into account. No transistor in the SRAM circuit is simulated with a SPICE compact model.

Figure 1: Schematic of the SRAM cell.

Based on this schematic, a three-dimensional structure composed of 2 NMOS and 2 PMOS is created with DevEdit3D. The 3D structure was meshed using tetrahedral elements. Different remeshing type (i.e cylindrical, box) has been carried out where the strike was applied (node 2 of figure 1). Tetrahedral elements of the three-dimensional structure are shown in Figure 2.

Figure 2: 3D SRAM cell and tetrahedral mesh where the strike will be applied.

 

3. Simulation

VICTORY DEVICE is used within deckbuild. The orientation of the SEU strike is specified by a pair of (x,y,z) coordinates corresponding to the entry and exit locations as shown below:

single entry=”X,Ymin,Z” exit=”X,Ymax,Z” radius=0.05
density=2e19 t0=4.e-12 tc=2.e-12

Syntax to define cylindrical mesh along the track is shown as follow:

regrid x.min=X y.min=Ymin z.min=Z \
x.max=X y.max=Ymax z.max=Z \
radius=0.02 rmax=8 num.cylinders=4 conform

The resulting mesh and electron generation along the track is shown in figure 3. The single event upset track is assumed to be cylindrical, and the location of the peak charge density in time can be specified along with the width (in time) of the charge generation pulse. A default SEU function exists in VICTORY DEVICE but any user-defined strike function can be created and used with the beam command as shown below:

beam f.radiate=ion_c_inter.lib

The specified DC biasing of the SRAM circuit sets nodes three and two to 0.0 and 1.2 V respectively. The DC biasing on the SRAM circuit is used as the initial condition for the transient analysis. The transient analysis is carried out for 0.1 microseconds with an initial time step of ten femtoseconds. The SEU strike has a maximum density at 4 picoseconds and a width of two picoseconds.

Figure 3: 3D SRAM structure showing the location of the strike and electron concentration after 3.7e-12s.

 

4. Results

VICTORY simulation outputs provide the node voltages and currents as a function of the transient time. Additionally the internal device behavior (e.g., potential and electron concentration) can be analyzed as a function of the transient time.

A plot of the voltages at nodes two (anode) and three (collector) versus transient time shows how these voltages are affected by the incoming SEU (Figure 4).

Figure 4: Voltages at nodes 2 and 3 (see Figure 1) versus transient time. The anode voltage corresponds to node 2 and the cathode voltage to node 3.

 

Mesh refinement (any type) may introduce obtuse triangles which could sometimes prevent the simulation to converge in certain circumstances. A new method for calculating an SEU pulse have been developed. This is invoked by setting “seu.integrate” on the method statement. The method consists of integrate the charges generated along the SEU track independently of the actual mesh, and distribute the result among the most appropriate existing mesh points. No (or very little) mesh refinement is required for this. As can be seen in Figure 5 identical results are obtained with and without mesh refinement.

Figure 5: Voltages at nodes 2 and 3 versus transient time for a cylindrical remesh and with no remesh and the use of the seu.integrate function.

 

To optimize simulation time one can reload previously saved DC bias point with associated contact definition (slaved electrodes, current boundary condition and work function). As can be seen in Figure 6 identical results are obtained when a DC bias is reloaded before doing the SEU transient simulation, compare to a full DC and transient simulation.

Figure 6: Voltages at nodes 2 and 3 (see Figure 4) versus transient time for a full DC and SEU transient simulation and when a DC previously saved bias point before SEU transient simulation is loaded.

 

A plot of the voltages at nodes two and three versus transient time is shown depending on the intensity of the strike (Figure 7). Thus the behavior of the SRAM cell can be analyzed as a function of the intensity of the strike. For a low intensity (green curves), the SRAM does not switch whereas for a higher intensity (red curves) voltages switch.

Figure 7: Voltages at nodes 2 and 3 (see Figure 3) versus transient time and intensity of the strike.

 

Three-dimensional electron current density contours can be used to follow the evolution of the electron current density in the impacted NMOSFET as the SRAM cell experiences the upset. Initially, a low electron current density flows between the source and drain regions of the NMOSFET (the transistor is off). As the SEU strike enters the NMOSFET, electron-hole pairs are created along the SEU strike path, altering the electron distribution throughout the device and thus increasing the electron current density in the NMOSFET (the transistor is on) (Figure 8). As the SEU strike exits the structure, the external charge source is removed and the original electron current density is reestablished (the transistor is off again).

Figure 8: Current density at the drain of NMOS Transistor (node 3) at t=3.7e-12s.

 

5. Circuit Simulation

As previously described, it is very interesting to be able to analyze in detail the behavior of transistors or circuits composed by a small number of transistor using TCAD simulation. Indeed, one can establish quantities such as potential, electron concentration and current density that allow the user to study in detail the behavior of the impacted devices. However, when we want to study the SEU impact on larger circuits, TCAD simulation is no longer possible. This is why specific feature SmartSpice was developed to accurately simulate (Single Event Effect) in MOS (Bulk and SOI) and in Bipolar devices. The impact of incident particles induces a generation of hole-electron pairs. A current generator is inserted in the circuit to model the charge collected on an assumed susceptible node as a result of the particle hit. The shape of the generated current is closely approximated by a double-exponential source available in SmartSpice. Other waveforms are also available.

A plot of the voltages of a latch circuit versus transient time shows how these voltages are affected by the incoming SEU particle (Figure 9).

 

Figure 9: latch circuit behavior affected by incoming single event upset particle.

 

Figure 9 shows the stable state of the latch (top figure), then the influence of an impact at t=10ns (middle figure). The effect produces only a parasitic effect without affecting the state of the latch. When increasing the energy (LEF), the impact changes the state of the latch and produces an error in the circuit (bottom figure).

SmartSpice is able to simulate multiple impacts at the same time or at different time on different nodes of the circuit. The user can personalize the upset detection with absolute or relative threshold on any nodes at the same time. The Critical charge (QCRIT), which causes a change of state, can be automatically computed. Please refer to the SmartSpice documentation for more details.

 

6. Conclusion

We have demonstrated that VICTORY DEVICE account for the SEU strike charge generation thanks to specific meshing capabilities and accurate physical models. The SmartSpice current source can be fitted to the current profile calculated from VICTORY DEVICE, which then allows the SEU upset of any type of circuits to be predicted using SmartSpice.

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