Modeling and Parameter Extraction Technique for HV MOS Devices with BSIM3v3
Takao Myono, SANYO Electric Co., Ltd.
1. Introduction
We have developed several kinds of HV MOS devices whose device structures and doping levels in the offset regions differ depending on the specifications of the devices. We have developed the bi-directional HV MOS device (e.g., it can be used as a bi-directional MOS switch) with both drain and source offset regions, and we previously described its SPICE model [4] - [5] based on BSIM3v3 [1] - [3]. On the other hand, the uni-directional HV MOS device has only a drain offset region. That is, it does not have a source offset region with corresponding source resistance.
In this paper, I have used the same technique to model uni-directional HV MOS devices as previously reported for bi-directional HV MOS devices [4] -[5] while adopting a new parameter extraction technique. With the new uni-directional HV MOS modeling technique, the simulated I-V characteristics of the uni-directional n-channel HV MOS device match the measured characteristics well, which confirms its effectiveness.
Figure 1. Schematic structure of the uni-directional
n-channel HV MOS device.
2. Uni-directional HV MOS Device Technology
Figure 1 shows the structure of our 45 V n-channel HV MOS device, with a gate-oxide film thickness (Tox) of 1350, channel length (L) of 3.2µm and offset of 3.2µm . A n-offset region of low doping concentration is used in the drain region, in order to realize high uni-directional drain-source breakdown voltage. Based on our device simulations, we consider that the basic operation of the bi-directional HV MOS device is as explained below , and this is also valid for the uni-directional HV MOS device. When drain-source voltage (V_{ds}) is applied to the HV MOS device, a depletion region grows in the n- offset. The effect of the electric field from the gate electrode on the depletion region causes the drain-side channel terminal voltage to saturate at a low voltage. This reduces the voltage across the channel, and hence increases the breakdown voltage between the drain and source. Moreover, as the drain-side channel terminal voltage saturates in the triode region, g_{m} is reduced.
3. Application of Bi-directional HV MOS Model to Uni-directional HV MOS Device
In this section, I directly apply the bi-directional HV MOS model and its parameter extraction technique to the uni-directional HV MOS device, and investigate the results. The bi-directional HV MOS model parameter extraction technique is outlined below [4] - [5]:
- First, extract all BSIM3v3 parameters by the standard
method.
- Then set the value of VSAT to a large value
(e.g., 1x10^{9} m/sec) assuming a long-channel device.
- Optimize AGS and DELTA at the same time. This is to optimize the saturation voltage of the drain-side channel terminal Vdsat and the source resistance due to the offset region.
Using the above procedure for the bi-directional HV MOS device, the parameter AGS optimizes V_{dsat} and source resistance in a well-balanced manner, and the measured and simulated I-V characteristics match well. Furthermore, this method can precisely reproduce the g_{m}-reduction phenomenon, which is inherent to HV MOS devices. On the other hand, step II in Table 1 shows the parameters obtained by directly applying the bi-directional HV MOS device model and parameter extraction technique to the uni-directional HV MOS device, and Figure 2 shows a comparison of the measured and simulated I-V characteristics. In Figure 2 large discrepancies are observed between the measured and simulated I-V characteristics.
Figure 2. Comparison between measured and simulated.
(with the bi-directional HV MOS model)
I-V characteristics of the 45V HV MOS device.
4. Proposed Uni-directional HV MOS Device Modeling Technique
In this section I propose a uni-directional HV MOS modeling technique: I use the bi-directional HV MOS model in [4] - [5] as a basis, and the main equations are as follows:
Here, W is the channel width, ?_{eff} is the effective mobility, _{ox} is the permitivity of the silicon-oxide film, V_{th} is the threshold voltage, AGS is the gate bias coefficient of the A_{bulk}, V_{dsat} is the saturation value of the drain-side channel terminal, V_{dseff} is the effective drain-source voltage and DELTA is the effective drain voltage smoothing parameter of V_{dseff}. Where, V?d_{s} is the drain-side channel terminal voltage, which is equivalent to the V_{dseff} of BSIM3v3.
V_{rs} is voltage drop across the source resistance in the offset region. It cannot be eliminated from equation (1) as V_{rs} is inherent for the bi-directional HV MOS model with BSIM3v3. Hence, it is necessary to compensate for part of the drain current component by V_{rs} in equation (1) for the uni-directional HV MOS model. Here, I define the drain current I_{drs0} in which the voltage V_{rs} in equation (1) is eliminated as shown below. I_{drs0} is a model equation for the uni-directional HV MOS device model.
Further, by defining I_{vrs} as the variable component of drain current due to V_{rs}, I obtain the following expression:
The above expression indicates that the way to compensate for I_{vrs} in the uni-directional HV MOS model is to optimize I_{drs0} by making it larger than Ids by the value of I_{vrs}. Here it can be assumed that the value of I_{ds} is equivalent to the measured data. Suppose the parameter AGS is set to a large negative value, the value of A_{bulk} in equation (4) increases, which in turn decreases the value of Vdsat in equation (5) and results in decreasing the value of I_{drs0}. At the same time, A_{bulk} increases the value of I_{vrs} larger. So, AGS cannot optimize V_{dsat} correctly, and I_{ds} cannot represent the g_{m}-reduction (refer to section 7.). In addition, the value of I_{vrs} cannot be obtained directly by calculation; instead use the following equation:
I propose the following model which can express the g_{m}-reduction.
- BSIM3v3 SPICE model combines the source and drain
resistance with R_{ds} (whose value depends on V_{gs})
as follows:
where RDSW is the source and drain resistance per unit channel width and PRWG is a V_{gs} coefficient. R_{ds} is incorporated in the drain current expression of the simplified model as an explicit function of G_{ds0} shown in equation (3), and R_{ds} hardly affects the saturation voltage (V_{dsat}) of BSIM3v3. Note that G_{ds0} has R_{ds} in its denominator, and by making R_{ds} a function of V_{gs}, it is possible to accurately express the g_{m}-reduction for I_{dsr0} and I_{ds} mathematically.
- R_{ds} provides the g_{m}-reduction
for I_{drs0} and I_{ds}, but they are
not the same. I_{drs0} with a larger absolute value has
larger g_{m}-reduction, so that it can give most appropriate
g_{m}-reduction in order to compensate the value of I_{vrs},
which is I_{drs0} - I_{ds}.
- R_{ds} has little influence on V_{dsat},
and it can be utilized independently of AGS.
- AGS can be used to optimize the absolute
value of I_{ds}, through V_{dsat}.
- For HV MOS devices, both V_{gs}-caused mobility degradation effect and g_{m}-reduction occur at the same time and influence of the latter is more predominant. So in the HV MOS model, it is possible to ignore the mobility degradation effect. By defining ?_{eff} as a constant regarding to V_{gs}, we can obtain about five times faster optimization of the parameters for the parameter extraction tool.
5. Proposed Parameter Extraction Technique for Uni-Directional HV MOS Device Modeling
In this section I describe the proposed parameter extraction technique for the uni-directional HV MOS model which can be implemented by using a SPICE model parameter extraction system, such as UTMOST [6].
- First, extract all BSIM3v3 parameters by the standard
method (step I in Table 1).
- Then set the value of VSAT to a large value
(e.g., 1x10)
assuming the long channel model.
- Optimize the parameters of U0, RDSW, PRWG, AGS,
and DELTA together in all the triode region (up to close to the
saturation region) i.e., from (V_{ds}=0V, V_{gs}=1.93V)
to (V_{ds}=20V, V_{gs}=45V). RDSW
and PRWG have to be optimized such that R_{ds}
expresses g_{m}-reduction of I_{drs0}
while AGS has to be optimized such that A_{bulk}
and V_{dsat} compensate for I_{vrs}.
- Optimize PDIBLC1 and PDIBLC2
AGS | U0 | UA | RDSW | PRWG | |
Step I | 0.084 | 616 | 0.7x10 | 3.8x10 | 0.0 |
Step II | -0.049 | 520 | 0.4x10 | 3.8x10 | 0.0 |
Step III | -0.076 | 463 | 0.0 | 1.9x10 | 0.092 |
Step IV | -0.077 | 588 | 0.0 | 5.5x10 | 0.018 |
Table 1. Extracted BSIM3v3 Parameter Values for each step.
Since optimization of the absolute value of I_{ds} and g_{m} interact with each other, it is necessary to optimize them simultaneously. Step III in Table 1 shows extracted parameter values based on the above procedure, and Figure 3 shows a comparison between the measured and simulated I-V characteristics. I see that good agreement is obtained between the measured and simulated results (except for the region where negative g_{ds} appears.).
In Figure 3, accuracy of simulation decreases in the linear region with higher value of V_{gs}. This is because R_{ds} provides the g_{m}-reduction in all the region. However, g_{m}-reduction due to the drain-side offset region appears only in the saturation region. To compensate for the worsening accuracy, it is effective to implement Step III again by setting the channel length modulation parameter PCLM=0 (or optimize). The 0 value of PCLM amplifies the g_{m}-reduction in the saturation region, so that V_{gs} dependence of Rds is optimized smaller (Step IV in table 1). As a result of this, g_{m}-reduction caused by R_{ds} in the linear region gets smaller. Step IV in Table 1 shows the parameters with PCLM=0 and Figure 4 shows the comparison between the measured and simulated I-V characteristics in the triode region. Figure 5 shows I_{ds}-V_{gs} characteristics in triode region. Note that I_{ds} monotonically increases under the condition of V_{gs} 40V, however, Ids slightly decreases when V_{gs} 40V, and this phenomenon is more predominant when V_{ds} = 1V than V_{ds} = 2V. This is due to the decrease of the channel voltage of the drain terminal by the influence of the gate electric field.
Figure 3. Comparison between the measured and
simulated
(with the uni-directional model) I-V characteristics
of the 45V n-channel HV MOS device.
Figure 4. Comparison between the measured and simulated
(with the uni-directional HV MOS model and PCLM=0)
I-V characteristics in the triode region.
Figure 5. Comparison between the measured and simulated
(with the uni-directional HV MOS model)
Ids-Vgs characteristics in triode region.
References
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