Reverse Engineering An AlGaAs/InGaAs PHEMT With FastBlaze

Introduction

FastBlaze is an ultra-fast physical MESFET and HEMT simulator which incorporates advanced physical models. By designing the simulator and its framework specifically for these devices, Silvaco has optimized device simulation algorithms and data structures for high speed without sacrificing the accuracy of the physical models. The application of FastBlaze to the simulation of a specific PHEMT is presented here. We highlight details of how the device was constructed and how the simulation was tuned to match the reported device characteristics.

Device Description

This simulation was based on a double recessed pseudomorphic GaAs High Electron Mobility Transistor (PHEMT) for high voltage operation. The construction and operation of this device was described by Kao et al., of GE, in the 1992 IEEE IEDM Technical Digest [1]. They reported that a PHEMT with 0.25 um gate length exhibited a gate to drain breakdown voltage of 30 volts, a peak gm of 510 mS/mm, and a maximum current density of 540 mA/mm. The device also had excellent 4.5 and 10 GHz power performance.


Construction Details

In the brief details about the device, the authors provided a lot of detail about the epitaxial layer structure, see Figure 1, but no information about the depths of the recesses, the recess lengths, gate-to-recess edge lengths, the Schottky barrier height and the gate-to-channel spacing. Also not mentioned are process related parameters like surface trap density and mobility in the channel, which require specialized measurement techniques and equipment. With reasonable choices of these parameters we have a starting point for tuning the simulation. A plot of the PHEMT structure is shown in Figure 2.


Figure 1. Layer structure of PHEMT[1] used in the FastBlaze simulation.

 


Figure 2. Two-dimensional structure of the initial PHEMT design and its
net doping vertically through the source.

 

Tuning Procedures

The parameters are tuned for three results: Vt, Idss, and breakdown voltage, in that order.

  1. The threshold voltage is primarily a function of the charge under the gate and the Schottky built-in bias. Vt is not a strong function of surface state density. The parameters we need to tune are the gate-to-channel spacing, the top delta doping, and the Schottky bias.


  2. Idss is affected by the charge underneath the gate, the transport characteristics, and the access resistance to and from the gate. This access resistance is primarily a function of the charge under the cap region (also low-field mobility) hence this parameter is affected by the surface trap density, which captures carriers on the surface and decreases the total amount of free charge. Measurements show the surface pinning potential due to surface states to be around 0.5 - 0.7 eV and hence when designing your input deck you should always check this value at the gate recess depth. A note on mobility: FastBlaze uses the local impurity density to calculate the mobility. In PHEMT devices this omits any surface and non-local scattering mechanisms present in the device. To obtain better correlation with experimental results the user should scale down actual channel mobility to about 85% of the ideal InGaAs mobility. The parameters we need to tune for Idss are therefore surface trap density and mobility scaling.


  3. Finally the breakdown voltage is controlled principally by the peak lateral field generated in the device. (Impact ionization is an exponential function of field) The way to increase breakdown is to decrease the peak lateral field. This is done by using a double recess gate technology which spreads out the field generated at the drain edge of the gate over the 2nd recess gate-drain region reducing the overall peak field value. With uniformly doped caps the 2nd recess depth should be optimum between 65-85% of the total recess depth. Note that the 2nd recess has an adverse effect on Idss since we are producing a region of higher resistance and consequently the peak gm will also be reduced. You therefore have to balance any increase of breakdown voltage with a reduction in gm. The parameter we need to tune for breakdown voltage is the second recess depth.


  4. (4) Iterate the above until agreement is obtained. FastBlaze can be used within the Virtual Wafer Fab Automation Tools to facilitate the design of the tuning simulations.




Simulation Results

Tuning the delta doping for threshold voltage gave the results shown in Figure 3. The delta dose was chosen to make Vt = -0.4. Tuning the surface trap density for Idmax gave the results shown in Figure 4. The surface trap density was therefore chosen to be 1.7e12, which implies Idmax = 540 mA/mm. The surface potential was extracted from a charge-control analysis under the gate and under the cap layer at the total recess depth. Figure 5 shows conduction band voltage versus depth. In this case the potential at the surface of the recess is 0.6 volts. The result of tuning the simulation for Vt and Ids with this procedure is shown in the close agreement with the experimental data in Figure 6. After tuning, the breakdown voltage was 30.1 volts at the second recess depth of 0.044 um. The tuning curve for breakdown voltage versus second recess depth is shown in Figure 7.

Figure 3. FastBlaze results showing the effect of delta layer doping on the threshold voltage. Figure 4. FastBlaze results showing effect of the surface trap density on the simulated maximum drain current.

 

Figure 5. Conduction band profile under the recess of the PHEMT showing surface potential pinning. Figure 6. Comparison between the FastBlaze simulated drain current and measured data [1] as the gate voltage is swept from -lV to lV.

 

Figure 7. FastBlaze results showing the simulated variation of breakdown voltage with depth of the second recess.

 

 

Conclusions


By following a straightforward procedure for tuning a HEMT simulation, good agreement with experiment can be easily found. FastBlaze is not only an excellent tool for designing HEMTs and MESFETs, it is fast enough to be used quickly within VWF to reverse engineer HEMT designs.



References

  1. M-Y Kao, S-T Fu, P Ho, P. M. Smith, P. C. Chao, K. J. Nordheden, and S. Wang, "Very High Voltage AlGaAs/InGaAs Pseudomorphic Power HEMTs",, 1992 IEEE IEDM Technical Digest, p.319 - 321, 1992.