EXACT - Process Technology Based Interconnect Parasitic Library Generation

EXACT is a new tool that enables engineers to build process dependent behavioral models (RSMs) of interconnect parasitics for a given technology. Results from Exact are used by IC design LPE tools in the extraction of full chip interconnect parasitics. Exact is based on a combination of advanced 3D TCAD process simulation, an accurate 3D electrical field solver, and innovative Design Of Experiment (DOE) automated structure generation and curve fitting utilities.

Exact is tightly coupled with the lithography, deposition and etching modules of Silvaco's advanced 3D backend process simulator ODIN. Users can define arbitrary multi-layer parameterized test structures using the interactive or DOE capabilities within Exact , and simulate the true process-dependent 3D geometry of the structure. The parasitics for the structure are calculated using an accurate 3D field solver that account for effects such as multiple dielectrics and shielding. The resulting parasitic values calculated using Exact supplement existing LPE environments by providing highly accurate parasitic models and technology rules that describe the impact of process-related variations and design changes on the properties of the interconnect structures.

 

Process Dependence of Interconnect Extraction

With the drive to sub-half micron technology, the complexity of interconnect geometry extracted using a realistic process simulation have more and more influence on the electrical models of the interconnect as the clock frequency increases. There is no doubt, that only 3D field solver calculation of the interconnect parasitics should be strongly linked to process simulation. This means that the 3D field solver must be applied to interconnect geometries obtained from the correct process flow as opposed to solid modeling approaches used by other parasitic extraction tools. The irregularities will become more important as the frequency increases. An example of the large effect on capacitance for a simple metal elbow structure is given in Table 1. Over 25% difference in capacitance is seen between the realistic structure and a simple 'rectangular block' approximation (Manhattan geometry).

Figure1: Metal Elbow structure using realistic etch
and lithography models. Effects on metal profile
and corner rounding are clearly seen. The resulting
capacitance is over 25% different from a simple
'rectangular block' approximation to the geometry.

 

Metal Geometry Capacitance
IDEALIZED 0.60fF
with ETCH 0.57fF
with LITHOGRAPHY 0.47fF
with ETCH+LITHOGRAPHY 0.44fF

Table 1. Comparison of inter-metal capacitance
for the Metal Elbow structure in Figure 1

 

Who needs results from EXACT?

Verification Engineers: EXACT provides LPE tools with accurate models to be used to extract the interconnect parasitics of a chip. These models are built taking into account not only the "geometrical" process parameters (dielectric and metal thicknesses, dielectric permittivity) but also the "physical" process parameters (lithography, deposition and etching models).

Designers: EXACT is a powerful tool to calculate accurately the interconnect parasitics (not just capacitance) as functions of design parameters (Metal Width, Metal Space). This parasitic information is needed for accurate analog circuit simulation for such design targets as timing, power analysis, signal integrity.

Process Engineers: Characterized models from EXACT show the effect of process changes on test structure measurements. Process effects such as dielectric thicknesses, multiple metal layers and lithography can easily be analyzed.

 

Easy to Use GUI

The goal of using EXACT is to build behavioral models for interconnect parasitics as a function of process and layout variations. This approach to simulation is used successfully in the 'Virtual Wafer Fab' for TCAD applications. The EXACT user interface simplifies the task of definition of input process flow, parameterized layouts and experimental designs. The GUI also acts as a data manager to store results as worksheets, equation fits and as RSM models. It also allows export of the final interconnect libraries to LPE tools.

Figure 2: The Graphical User Interface for EXACT guides users in
the creation of fitted technology dependent interconnect models.

 

 

Interactive Test Structure Definition

To extract interconnect parasitics as a function of geometry, it is necessary to define parameterized interconnect test structures. EXACT features an interactive GUI for arbitrary structure definition. Test structures are defined as 'sticks'. Easy-to-use slide bar controls on variables such as metal width or space allow users to prototype the process variations (Figure 3). EXACT also supports text-driven batchmode layout commands for advanced users.

 


Figure 3 : Test structures in EXACT are defined using an
interactive menu. Slide bars allow users to observe the effects of
layout changes on the parameterized structure.

 

Experimental Design

Design of experiments (DOE) is a key feature of EXACT. When the number of process and geometry variables becomes high the number of separate simulation runs can escalate. DOE is used to optimize the number of simulation runs actually required to generate a behavioral model (Figure 4).

Figure 4: Design of Experiments setup menu for
EXACT. DOE setups may be saved and loaded
from the EXACT data manager.

 

Analyzing Behavioral Models for Interconnects

The resistance and capacitance extracted from each structure are archived in worksheets with the related design and process data. EXACT provides built-in features for the creation of technology rules that represent the parasitic values as a function of design and/or process parameters.

A data fitting utility creates arbitrary equations to be used in LPE tools that describe the relationship between the parasitic values and the underlying process and design parameters of the structure. Visualization capabilities are available to view the resulting 2D and 3D behavioral models.

Figure 5 : Worksheet of raw capacitance vs. geometry data.

 

Calibration to Silicon

The accuracy of interconnect parasitics is crucial to the success of modern deep sub-micron designs. Parasitic extraction tools must be able to provide dependable resistance and capacitance values over the full range of manufacturing variations. The capabilities of EXACT have been developed to meet this criterion. The behavioral models that are generated describing resistances and capacitances as functions of geometric design and physical process parameters can be compared to measured capacitance data for calibration. Isolated experiments can be used to optimize design parameters for a given process, or to optimize critical process parameters to meet circuit performance requirements.

 

Figure 6 :EXACT fits pre-defined or user generated
equations to the raw data.Coefficients in the equations
are optimized to provide the best fit

 

Figure 7. Behavioral model of inter metal capacitance
as a function of metal width and space.