Fundamental Improvements in BSIM3v3.1 Model

(Available in SmartSpice)

 

SmartSpice 1.4.7, released in December 1996, contains a number of modifications and improvements in the BSIM3v3 Level 8 model. Among the most important are:

(1) The BSIM3 short_channel intrinsic capacitance models CAPMOD=1 and 2 were significantly improved. These models, verified by Silvaco's S-Pisces (ATLAS), fully address the problems of non-physical behavior of certain capacitances in the original Berkeley short channel capacitance models. The improved models can be invoked using the selector INTCAP.

(2) The modeling of the BSIM3 substrate current was significantly improved. The new IIRAT parameter, verified by Silvaco's S-Pisces (ATLAS), can be used to direct a certain portion of the substrate current to source.

(3) The latest BSIM3 Version 3.1 released by UC Berkeley on December 11 1996 was integrated into SmartSpice. A detailed analysis of Berkeley's Version 3.1 was presented in [1]. Most of the improvements and bug fixes in Version 3.1 (see in[2]) are well known , and were implemented in SmartSpice 1.4.0 in December 1995. [3].

The only items of practical interest are the bux fixes in the BSIM3 3.1 noise model, and the implementation of the modified BSIM1 capacitance model (CAPMOD=0).

BSIM3 3.1 noise analysis is now supported in SmartSpice. The CAPMOD=0 capacitance model was also integrated into the SmartSpice 1.4.7 BSIM3 Version 3.0 and 3.1 Level 8 models after certain necessary corrections and bug fixes.

For completeness, the original Berkeley BSIM3 Version 3.0 and 3.1 models were also integrated into SmartSpice as MOSFET Level 81 models without any changes or modifications by Silvaco.

1. Intrinsic Capacitances in BSIM3 Model

1.1 Capacitances in BSIM3 Model

The BSIM3 charge-conserving capacitance models are based on the terminal charges qg, qb, qd and qs associated with the gate, bulk, drain and source. These charges are calculated as functions of the gate, drain, source and bulk voltages. The partitioning of the channel charge (ratio of qd to qs) in saturation is determined by the model parameter XPART.

The calculation of 16 transcapacitances used in .AC and .TRAN analyses is based on the nine partial derivatives (basis transcapacitances) of the terminal charges qg, qd and qb with respect to the voltages Vgb, Vdb and Vsb:

These derivatives (basis transcapacitances) as well as the charges qg, qb and qd are accessible for direct post-processing in all SmartSpice BSIM3 models. They can be used to calculate device intrinsic capacitances. For example, the total gate capacitance CGG = cggb, the gate to source capacitance CGS = -cgsb, the gate to drain capacitance CGD=-cgdb, and so on[4].

1.2 Intrinsic Capacitance Problems

The original Berkeley short channel capacitance models CAPMOD=1 and 2 in both 3.0 and 3.1 reveal nonphysical behavior of certain capacitances in all operating regions. Figures 1-6 below illustrate some of the problems. More detailed information related to CAPMOD=1 and 2 capacitance models can be found in [1], [4] and [5].

Nine basic transcapacitances of the CAPMOD=2 terminal charges are shown in Figure 1 The same transcapacitances modeled by ATLAS are shown in Figure 2 .



Figure 1. CAPMOD=2 basic transcapacitances.

 

Figure 2. Basic transcapacitances modeled by ATLAS.

The CAPMOD=2 transcapacitance curve shapes are in good agreement with those produced by ATLAS. However, four BSIM3v3.1 transcapacitances cgsb, cbsb, cddb and cgdb change signs while the gate voltage is changing from -2 to 8. The transcapacitances cgsb and cbsb are not equal to zero in the subthreshold region (the capacitance cgs =-cgsb has a non-physical negative value). In contrast, the ATLAS modeled transcapacitances don't reveal any sign changes and the transcapacitances cgsb and cbsb are equal to zero in the subthreshold region.

The CAPMOD=1 and 2 transcapacitances cgsb and cgdb at Vds=0.0 are shown in Figure 3 The same transcapacitances modeled by ATLAS are shown in Figure 4.


Figure 3. CAPMOD=1 and 2 transcapacitances at Vds=0.

 

Figure 4: Transcapacitances modeled by ATLAS ad Vds=0.

 

The CAPMOD=1 transcapacitances cgsb and cgdb have erroneous values in the subthreshold region at Vds=0.0. The CAPMOD=2 transcapacitance cgdb is equal to zero in subthreshold region, and close to the theoretically correct value of 0.5*Cox*W*L in the linear region. However, the CAPMOD=2 transcapacitance cgsb demonstrates a nonphysical shift, in all operating regions, that depends on the actual BSIM3v3.1 model parameter values. In contrast, the ATLAS modeled capacitances Cgs and Cgd are identical.

The BSIM3v3.1 CAPMOD=0 transcapacitances cgsb, cbsb and cbdb at Vds=0.0 are shown in Figure 5. The transcapacitances cgsb and cbsb are equal to zero in the subthreshold region as in Figure 2. However, the CAPMOD=0 transcapacitance cbdb is obviously incorrect.

Figure 6 illustrates a discontinuity in the BSIM3v3.1 CAPMOD=0 charge equations at certain bias conditions.

Figure 5. Discontinuity in CAPMOD=0 transcapacitance

Figure 6: Discontinuity in CAPMOD=0 gate charge

 

1.3 Modifications and Improvements in Berkeley's Version 3.1

1.3.1 CAPMOD=1 and 2 Capacitance Models

(1) CAPMOD=2 is now the default model in Version 3.1

(2) Discontinuity (sqrt domain error) problem in CAPMOD=2 was fixed. There are other modifications in Berkeley's CAPMOD=1 and 2. However, problems of with nonphysical behavior are still present in Berkeley's CAPMOD=1 and 2 models (see Figure 1, 3 and [1]).

1.3.2 CAPMOD=0 Capacitance Model

(1) The model CAPMOD=0 based on a modification of Berkeley's BSIM1 capacitance model, fixes the most serious problems of the CAPMOD=1 and 2 models (see the transcapacitances cgsb and cbsb in Figure 5 ).

(2) The BSIM3 bulk charge effect is taken into account. However, applicability of this effect to the intrinsic capacitances is questionable[1] ( see the transcapacitance cbsb in Figure 8, and the transcapacitance cddb in [1]).

(3) There are discontinuities in charges and capacitances.

(4) The parameter VFBCV in CAPMOD=0 is not consistent with that in the BSIM3 DC model.

(5) CAPMOD=0 is not consistent with the BSIM3 non-quasi static and overlap capacitance models.

 

1.4. Silvaco' Improvements to BSIM3

Capacitance Models

The new model selector INTCAP can be specified to invoke the Silvaco implementation of the intrinsic capacitance models. The default value is INTCAP=0 (OFF - Berkeley's models). The improvements made by Silvaco affect the nonphysical capacitances only. The correct original Berkeley capacitances remain virtually the same [1].

The model selector INTCAP > 0 is supported in both 3.0 and 3.1 models.

1.4.1 Improvements in BSIM3 capacitance models CAPMOD=1 and CAPMOD=2

(1) The selector INTCAP=1 was introduced to fix all problems of nonphysical behavior in the CAPMOD=1 and 2 capacitance models.

(2) INTCAP=1 is consistent with the BSIM3 DC, non-quasi static and overlap capacitance models.

Figure 7 illustrates improvements in the Silvaco implementation of the BSIM3 short_channel capacitance models invoked by INTCAP=1. The transcapacitances cgsb and cbsb are equal to zero in the subthreshold region, and the nonphysical shift of cgsb in the linear region has disappeared. INTCAP=1 also fixes the problem of the CAPMOD=1 transcapacitances in the subthreshold region at Vds=0.0.

Figure 7. CAPMOD=2 basic transcapacitances with INTCAP=1.


1.4.2 Improvements in Modified BSIM1 Capacitance Model CAPMOD=0

(1) The discontinuity in the capacitance equation was fixed.

(2) The parameter VFBCV can be set equal to the BSIM3 Vfb by specifying the parameter INTCAP=1

(3) The parameter INTCAP=2 along with CAPMOD=0 invokes Silvaco's implementation of the BSIM1 capacitance model.

(4) INTCAP=2 removes discontinuities in the charge equations.

The Figure8 illustrates improvements in the Silvaco implementation of the modified BSIM1 capacitance model CAPMOD=0. The transcapacitance cbdb is now correct. The questionable behavior of the transcapacitances cbsb and cddb can be corrected by INTCAP=2.

Figure 8. CAPMOD=0 basic transcapacitances.

 

2. Substrate Current in the BSIM3 Model

2.1 Impact Ionization Current Equations

There are two equations in the BSIM3 model related to the impact ionization current caused by large electrical field near the drain. The first equation calculates the current Iscbe as follows:

Iscbe = Idsa * PSCBE2*diffVds/Leff 
* exp(-PSCBE1* Litl/diffVds)




where

Idsa is the total drain current, including the CLM and DIBL effect currents

PSCBE2 and PSCBE1 are model parameters,

diffVd = Vds - Vdsat.

Litl is a bias independent parameter computed as a function of TOX and XJ.

The current Iscbe is directed entirely from the drain to the source.

The second equation calculates the current Isub as follows:

Isub = Idsa * ALPHA0*diffVds/Leff 
* exp(-BETA0/diffVds)




where

ALPHA0 and BETA0 are model parameters. The current Isub represents the portion of the impact ionization current directed from the source to the bulk. By default this portion is equal to zero because ALPHA0=0 by default.

2.2 Impact Ionization Current Partitioning

The simulation results produced by Silvaco's S-Pisces (ATLAS) show that the partitioning of the impact ionization current between source and drain depends significantly on the channel length.

Figure 9 illustrates the impact ionization current partitioning modeled by ATLAS. In long channel devices 100% of the impact ionization current flow into the bulk.

Figure 10 illustrates impact ionization current partitioning for short channel device. The entire impact ionization current flows into the source.

Figure 11 illustrates how the impact ionization current partitioning depends on the channel length.

 

Figure 9. I-V Characteristics for Lg=20mm.

 

Figure 10. I-V Characteristics for Lg=0.35µm.

 

Figure 11. Effect of channel length on breakdown mechanism.

 

 

2.3 Parameters IIRAT and ALPHA1

The model parameter, IIRAT implemented in SmartSpice 1.4.7 [1] can be used to direct a certain portion of the substrate current to the source.If IIRAT =0 then the entire impact ionization current is will be directed to the bulk of the device (see Figure 12 for long channel device).If IIRAT =1 then this current will be directed to the source as in Berkeley's default model (see Figure 14 for short channel device).The binning parameters LIIRAT, WIIRAT and PIIRAT can be used to adjust the actual IIRAT value depending on the geometry of a particular device.

 

Figure 12. Impact ionization current partitioning (L=1.5µm).

 

Figure 13. Impact ionization current partitioning (L=0.8µm).

 

Figure 14: Impact ionization current partitioning (L=0.25µm)

 

The IIRAT parameter was implemented as follows:

When the IIRAT parameter is explicitly specified in the .MODEL card the values of the model parameters ALPHA0 and BETA0 will be ignored.These values will be calculated automatically to provide a desired level of the substrate current partitioning between the bulk and source of the device.

SmartSpice also supports the ALPHA1 parameter ( the default value is 0).This parameter is used as follows

ALPHA0eff = ALPHA0 + ALPHA1 * Leff.

No binning parameters are supported for ALPHA1.