A Practical Example of VWF Methodology

Introduction

Silvaco's Virtual Wafer Fab (VWF) environment allows engineers to easily perform large scale experiments which would previously have required a prohibitive amount of user interaction. This article presents the methodology of VWF based experiments using a CMOS process as an example.

 

Process Definition

The aim of this article is to demonstrate the steps normally taken when using VWF to optimize a CMOS process. To utilize the full power of VWF, the process flow, as defined for Athena, should use MASK statements to define the mask information rather than explicitly defining etches using absolute `x' coordinate values. For example, the polysilicon layer is defined using the following sequence of Athena commands:

	deposit poly thick=0.30 divisions=5	
	mask name="POLY"	
	etch poly dry thick=0.40	
	strip

where the name "POLY" corresponds to the name of a MaskViews defined layer.

 

Device Definition

In this example, the n and p-MOS device definitions were taken from the layout for a typical CMOS inverter. The definitions were defined in MaskViews as cross-sections and stored in the VWF database. Figure 1 shows the mask cross-section used for the p-MOS device.

Figure 1. Location of mask edges for a PMOS.

Sensitivity Analysis

When investigating a full IC process using the VWF methodology, a full sensitivity analysis is normally the first experiment performed. This analysis will indicate which process parameters have the greatest influence on the output characteristics of interest. It normally involves `splitting' the input deck on all possible process parameters (all diffusion temperatures and times, implant doses and energies, etc.) as well as calibration parameters (e.g., Boron diffusivities).

For sensitivity analysis of this process, the parameters defined as split points were the dose and energy for the p-well, n-well, threshold adjust, n++ S/D, n-LDD, p++ S/D and p-LDD implants, along with the time and temperature for the n-well masking oxide, planar oxidation, field oxidation, sacrificial oxidation, gate oxidation, poly reox, and BPSG densification diffusions. While the calibration parameters were Arsenic, Boron and Phosphorus diffusivities and the Boron and Phosphorus Si/SiO2 segregation coefficients.

 

Device Tests

The device tests used were taken from the Atlas on-line examples. Care must be taken to ensure that any process related parameters used by the device tests are available. For this example, five device tests were used to calculate the device threshold voltage, Beta, Theta Leakage current, Idsmax, DIBL, Sub-threshold leakage and Gamma.The flow for this sensitivity analysis is shown in Figure 2. Note that both the n and p-MOS cross-sections are used in the analysis and each cross-section has five device tests associated with it, giving a total of ten device tests.

 

Figure 2. Flow editor for the sensitivity analysis.

Sensitivity Analysis Results

The results of the sensitivity analysis for both the n and p-MOS devices required 1344 simulation fragments and runs to 76 printed pages. Taking the top five dominant process parameters for each of the eight device characteristics measured, these results may be summarized in tabular form as shown in Table 1. The top two calibration parameters in the sensitivity analysis were the Boron Si/SiO2 segregation parameter and the Phosphorus diffusivity.

Table 1. Summary of the sensitivity analysis for the n-MOS device

The influence of the calibration parameters is, as is expected, minor when considered in the same set as the process parameters. However,this should not be interpreted to mean the calibration parameters are not important. The sensitivity analysis with regard to the calibration parameters serves a different purpose than the analysis of the processing parameters. For any fabrication facility, the underlying physical parameters need to be tuned to measured data from a set of runs through the process. Once the calibration parameters (diffusivities, segregation coefficients, etc.) have been tuned, the simulated results may be used with greater confidence.

The results of the sensitivity analysis for the calibration parameters are summarized in Table 2 where the top three calibration parameters for each device characteristic is identified (the summary is for the n-MOS device only).

Table 2. Summary of the sensitivity analysis: calibration parameters for the n-MOS device.

 

 

Design for Manufacturability

Using the results of the sensitivity analysis, a design for manufacturability experiment was performed where the influence of process variations may be seen on device characteristics. Since the temperatures of furnaces is well controlled, the two dominant diffusion steps (the well drive-in and the gate oxidation) were split on time rather than temperature. Both the dose and energy of the Vt adjust implant were used as split parameter, along with the p-well implant dose. The top two calibration parameters were also included. Using the results in Table 2, these two calibration parameters were the Boron Si/SiO2 segregation parameter and the Phosphorus diffusivity in Si.

A Box-Behnken experimental design was used. This required 842 simulation fragments for a single device. This represents an increase of 125% in the number of simulation fragments and an 80% decrease in the number of parameters when compared with the sensitivity analysis which demonstrates that a sensitivity analysis is relatively cheap and should, in general, be considered as the initial step in the simulation of a process.

Using the worksheet graphics and regression analysis, the results of the experiment may be visualized and stored in the VWF database for future reference. Figure 3 shows the simulated variation in the DIBL as a function of the Vt adjust implant energy and the gate oxidation time. Figure 4 shows the simulated variation in DIBL as a function of the two calibration parameters chosen for the experiment. Response surface models such as this may be used to fit simulated results to measured data.

 

Figure 3. n-MOS DIBL as a function of gate oxidation
time and Vt adjustment implant energy.

 

Figure 4. n-MOS DIBL as a function of the calibration parameters.

 

 

Conclusions

The example presented in this article demonstrates the use of the VWF in investigating the sensitivity of a CMOS process with respect to process variables. It was shown that a simple experiment can be used to identify key process parameters. They were further investigated by using the full experimental design techniques of the VWF. The inclusion of calibration parameters in experiments allowed tuning of the simulators to measured data.

The data presented in this article is available as part of the latest VWF release and it is used to demonstrate VWF database.