Extraction of DC and AC SPICE Model Parameters From HBT Devices Using The VWF

Several publications have shown that the Virtual Wafer Fab (VWF) can be used for semiconductor device design optimization [1],[2]. The inclusion of the advanced parameter extraction tool UTMOST into the VWF allows incorporation of accurate SPICE model parameter extraction in the optimization cycle. This integration now means that the results of VWF experiments can be imported into SPAYN for a detailed statistical analysis, with subsequent generation of worst-case SPICE models.

This approach for MOS technologies has been proven both in-house and by industrial users. This article demonstrates that this approach is also feasible for the design of high-frequency bipolar and heterojunction bipolar devices. Several improvements have been made in ATLAS and UTMOST in order to provide a seamless interface between the results of AC analysis in ATLAS and AC SPICE model extraction. Some of these improvements are described below in the context of a practical example of a SiGe heterojunction bipolar transistor (HBT).

 

Process Simulation

A Si/SiGe npn HBT was selected as a test device. The structure was simulated using the FLASH module of ATHENA which simulates deposition, ion implantation, and diffusion in SiGe. The final ATHENA structure and vertical doping distribution are shown in Figure 1. The base of the device is a 0.1 micron SiGe layer with constant Ge mole fraction.

 

Figure 1. SiGe HBT cross-section and doping
profile through active device area.

 

Two values of Ge mole fraction were used in the simulation in order to demonstrate the capability of optimizing SPICE model parameters by varying a process condition. Germanium fractions of 0.1 and 0.2 were considered. Any number of other process parameters (e.g. thickness of SiGe layer, doping, emitter width) as well as crucial material parameters (e.g. carrier lifetimes) could be used in a full-scale VWF optimization experiment.

 

Device Tests

ATLAS/BLAZE is used to simulate the device characteristics of the SiGe based device. Several basic device parameters can be extracted using ATLAS alone. For example, Figure 2 shows the DC current gain curves obtained from the Gummel curves.

 

Figure 2. Current gain characteristics for the HBT with
two different Ge mole fractions in the base.

 

However, it is much more important to be able to extract all DC, and especially AC, SPICE parameters from simulated IV and frequency curves. A minimum set of standard device tests for extracting a basic set of SPICE parameters is as follows:

  • Gummel plot with regular base bias steps preferably of 0.05 V.
  • A set of at least three ICVCE curves with regular VCE steps. Each curve should be calculated at a base current within the standard operation regime, provided that the base current steps between the curves are regular (for example, 1.0e-8 A, 2.0e-8, and 3.0e-8). Only forward Gummel-Poon and ICVCE data are simulated here.
  • A set of at least ten S-parameter versus frequency curves. The set should include at least five base voltages and at least two collector voltages. The base voltage steps should be regular (for example, 0.65V, 0.7V, 0.75V, 0.8V, and 0.85 V).

The UTMOST statement in ATLAS is used for converting Y-parameters to S-parameters. The output of the UTMOST statement has been improved in order to provide all the data needed for S-parameter extraction inside UTMOST.

Note that in order to extract a complete set of SPICE parameters a few other device tests, including reverse current characteristics, should be done.

 

UTMOST Characterization

After the characteristics for one device have been generated by ATLAS they are then used by UTMOST in interactive mode to define a generic extraction methodology. The quality of the local optimization procedure used in this case is shown in Figures 3a through 3c.

 

Figure 3a. Measured (i.e. generated by ATLAS) and simulated
Gummel plots for the nominal processing conditions.

 

Figure 3b. Measured (i.e. generated ATLAS) and simulated
IcVce curves for the nominal processing conditions.

 

Figure 3c. Measured (i.e. generated by ATLAS) and simulated
ft-plots for the nominal processing conditions.

 

All details of the extraction procedure are saved in an UTMOST model file which is subsequently used in a batch-mode UTMOST input file. This is run under VWF or in DeckBuild. The capability to load and

transform S-parameter log files generated by ATLAS has been implemented in the most recent version of UTMOST.

Reverse DC parameters can be also extracted if ATLAS/BLAZE has been set up to generate reverse DC characteristics. Some of the extraction results representing the forward Gummel Poon parameters are shown in Table 1.

 

Conclusion

ATHENA/FLASH, ATLAS/BLAZE and UTMOST/BIP simulators have been seamlessly used for the optimization of DC and AC SPICE parameters for a SiGe HBT device. All the segments of the simulation could be included in a full-scale VWF optimization process.

References

[1]. G. Le Carval, P. Hopper,
The Simulation Standard,
Vol. 5, No. 3, November 1994.

[2]. Silvaco International,
VWF/SPAYN Application Note, Reference No. SP/94/002.