Published Papers

Interconnect Modeling

The full text of most of these papers may be found at the IEEE website at www.ieee.org.

J. Piquet1, O. Cueto2, F. Charlet3, M. Thomas4, C. Bermond1, A. Farcy4, J. Torres4, B. Fléchet1,
"Simulation and Characterization of High-Frequency Performances of Advanced MIM Capacitors",
1LAHC, Université de Savoie, Bâtiment Le Chablais, 73376 Le Bourget du lac cedex, France.
2 CEA/DRT-LETI/D2NT-CEA/GRE, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France.
3 SILVACO. 55 rue Blaise Pascal 38330 Montbonnot St Martin France.
4STMicroelectronics, 850 rue Jean Monnet, 38926 Crolles cedex, France

T. Nagano, S. Kimura and J. Onuki
"Impact of Cu local interconnect on LSI performance"
Materials Transactions, Vol. 43, Jul. 2002, pp. 1574 - 1576.

Bermond, C et al
"Characterization of dual damascene Cu-SiO sub 2 interconnects in time and frequency domains"
Advanced Metallization Conference 2000 (AMC 2000); pp 19-24

R. R. Song, G. Ruan, X. Xiao, R. Streiter, T. Otto and T. Gessner,
"Geometrical optimizing design of interconnection for deep sub-micrometer VLSI circuits (in Chinese)"
Research & Progress of Solid State Electronics, Vol. 20, No.1, 2000, pp. 84-93.

Bermond C. Flechet B. Le Carval G. Charlet F. Morand Y.Angenieux G Salik R.
"Performance Characterization of Advanced Interconnect on High Speed VLSI Circuits"
Proc. ESSDERC 2000, pp. 216-219.

B. Froment et al
"Ultra low capacitance measurements in multilevel metallisation CMOS by using a built-in Electron-meter"
IEEE J. SS Ccts, 1999.

Chia-Fu Chou et al
"Sorting of biomolecules via microdevices"
Proc. IEDM 1999

B. Froment et al
"New Interconnect capacitance characterization method for multilevel metal CMOS processes"
Proc. IITC 1999.

C. Bermond et al
"Performance Characterization of Advanced Interconects on High Speed VLSI Circuits"
Proc. ESSDERC'99, pp. 216-219.

S. Putot et al
"A Fast and Accurate Computation of Interconnect Capacitance"
Proc. IEDM Tech. Dig., 1999, pp. 893-896.

G. LeCarval et al

Benoit Froment and Herve Jaouen,
"Validation of CLEVER Interconnect Parasitics with 0.18 µm Process Measurements"
SGS-Thomson Microelectronics

"Advanced Interconnect Scheme Analysis: Real Impact of Technological Improvements"
Proc. IEDM Tech Dig, 1998, pp. 837-840.

I. Kamohara
"Statistical simulation methodology for multi-level interconnect contact analysis and step coverage evaluation"
In 1997 2nd International Workshop on Statistical Metrology, 8 June 1997, Kyoto, Japan, pp. 113-116

R. Salik, P. Ferrari, A. Chosson, and G. Angnieux
"Electrical performance in time domain of subminiature interconnections on new thin films"
Proceeding of the 3rd IEEE International Symposium on Advanced Packaging Materials, 1997, pp. 143-146

B. Flechet, R. Salik, J. W. Tao, and G. Angenieux
"Microwave characterization of thin film materials for interconnections of advanced packaging"
Proceeding of the 3rd IEEE International Symposium on Advanced Packaging Materials, 1997, pp. 139-142

L. Floyd, M. O'Reilly and A. Mathewson
"Delay simulation comparisons between and multilevel interconnect"
Microelectronic Engineering, Vol. 33, January 1997, pp. 415-422.