Local Optimization Templates for Extracting
BSIM3v3.1 Parameters in UTMOST III

Introduction

The BSIM3v3.1 SPICE model has become an industry standard for modeling deep-submicron MOS technologies. The model is suitable for both digital and analog applications because of the better modeling of the output conductances and the physics based scaling which is embedded in the model equations. The model offers binning parameters for improving the model fits for certain devices. The BSIM3v3.1 model has been implemented in UTMOST III and SmartSpice since its first introduction.

The UTMOST user group has continuous interest in creating better BSIM3v3.1 models for their customers. This article is written to provide the latest local optimization templates perfected in Silvaco's model characterization lab.

Data Collection and Initial Parameter Extraction

The final quality of the optimized model depends heavily on the quality of collected data and the initial parameter extraction. UTMOST has a powerful automatic BSIM3v3.1 parameter extraction algorithm which is a part of the "BSIM3_MG" routine. The data for BSIM3v3.1 modeling should always be collected by using the BSIM3_MG routine. (See articles for BSIM3_MG extraction routine in the previous issues of the Simulation Standard.) The UTMOST extraction manual volume #1 also covers the entire operation of the BSIM_MG routine.

The recommended number of points per sweep in the BSIM3_MG routine is 51 and the number of VGS steps and VBS steps are 5. The Voffset value which is used to calculate the the first VGstart value for the ID/VD characteristics (Vgstart = VTextracted + Voffset) defaults to 0.5V. The Voffset value may seem high for some analog users who like to see the data closer to the threshold voltage. However the RDS related parameters are extracted better if the Voffset is around 0.5V. The user should pay attention to the measured characteristics of each device to make sure that there are no problem devices in the device array which is used for modeling.

The typical number of geometries used for model parameter extraction is 10 to 12. There should be a large device with wide W and long L (to avoid short channel or narrow width effects) to extract the root parameters (threshold voltage, mobility, etc.). The wide W and shortest L device and array of common wide W and short L devices should be present in the test chip to extract short channel effects. The long L and narrowest W device and maybe one or two more narrow W and long L devices should be present in the test chip to extract the narrow width effects. The last critical device geometries which need to be in the test chip are the small devices. The small devices are the narrow W and short L devices. The shortest L and narrowest W and one or two more small devices should be used for modeling. These are the devices which require many of the binning parameters within the BSIM3v3.1 model.

Local Optimization Strategies

After the data is collected the initial set of parameters is extracted by the BSIM3_MG routine. The ALL_DC routine can be used for local optimization. In this article's example a single ALL_DC routine will be used. The different types of data will be displayed in the ALL_DC graphics screen for different optimization strategies. This may require more user interface but it is easier to follow each step of local optimizations this way. Later the user may automate the local optimization strategies by utilizing the different ALL_DC routines. The operation of the local optimization is explained in the UTMOST User Manual.

Strategy #1: idvg_large_bsim3v3

This strategy is used for the wide W and long L device only. As it can be seen in the figure 1, it will optimize the "Current" of "ID/VG" characteristics. The Wide W and long L device should be selected in the "Geometry Selection Screen" (figure 3.) for each row in this strategy. The ID/VG characteristics of this device ( wide W and long L) should be present in the graphics screen.

The first row of the optimization is used for the threshold, mobility and mobility degradation related parameter optimization. Therefore the "sweep/start" and "sweep/stop" variables are both set to 1 (Figure 2) This will ensure that these parameters in row#1 will only use the data with VBS=0V (which is the sweep#1 for the ID/VG characteristics). The %5 to %100 for the current range will guarantee that the subthreshold data will not be used for this optimization. This is logical since the threshold and mobility related parameters should not be optimized for the subthreshold region.

The second row is used to optimize the back bias effects on threshold and mobility. The difference in the second row compare to the first row is the "sweep/stop" value. The "sweep/stop" value in the second row is set to 5 to include the remaining sweeps in the ID/VG characteristics which have the VBS value other than 0. (Figure 2).

The third row is created for the subthreshold region parameters NFACTOR and VOFF. The current min and current max is set to 1E-10 to 1E-7 to cover the sub VT region only. (Figure 2.)

Figure 1. Local optimization strategy definition screen for Strategy#1 (idvg_large_bsim3v3)

Figure 2. Local optimization target selection screen for Strategy#1 (idvg_large_bsim3v3)

Figure 3. Local optimization geometry selection screen for Strategy#1 (idvg_large_bsim3v3)

Strategy #2: idvg_narrow_bsim3v3

The strategy#2 is very similar to strategy#1 except the geometries used for optimization are different. The strategy#2 is used to optimize the threshold shift and width offset effects for narrow devices only. The strategy#2 will optimize the "Current" of "ID/VG" characteristics (Figure 4). The narrow W and long L devices should be selected for each row in this strategy. It is recommended to select typically 2 narrow W and long L devices. The ID/VG characteristics of the selected narrow W and long L devices should be present in the graphics screen.

The first row is used to optimize the parameters for the threshold shift (K3, W0) and the width offset (WINT). There is no back bias effect so the "sweep/start" and "sweep/stop" are set to 1 (Figure 5).

The second row includes the back bias effects (K3B) but only concentrates around the threshold region. Therefore the current max is set to 40% (Figure 5).

The third row is for the final re-optimization of the width offset and its gate field and back bias effects (DWG and DWB). The threshold region is not included for this optimization therefore the current min is set to 25% and current max is set to 100% (Figure 5).

Figure 4. Local optimization strategy definition screen for Strategy#2 (idvg_narrow_bsim3v3)

Figure 5. Local optimization target selection screen for Strategy#2 (idvg_narrow_bsim3v3)

Strategy #3: idvg_short_bsim3v3

The strategy#3 is similar to strategy#1 and #2. The geometries used for optimization are wide W and short L for each row. The strategy#3 is used to optimize the threshold shift and length offset and channel resistance effects for the short channel devices only. The strategy#3 will optimize the "Current" of "ID/VG" characteristics

(Figure 6). The wide W and short L devices should be selected for each row in this strategy. It is recommended to select maximum 3 wide W and short L devices for each row of optimization. The ID/VG characteristics of the selected wide W and short L devices should be present in the graphics screen.

The first row is used to optimize the parameters for the threshold shift (DVT0, DVT1, NLX), length offset (LINT) and channel resistance (RDSW). There is no back bias effect so the "sweep/start" and "sweep/stop" are set to 1 (Figure 7).

The second row includes the back bias effects (DVT2) but only concentrates around the threshold region. Therefore the current max is set to 40% (Figure 7).

The third row is for the final re-optimization of the width offset and its gate field and back bias effects (PRWG and PRWB). The threshold region is not included for this optimization so the current min is set to 20% and current max is set to 100% (Figure 7).

Figure 6. Local optimization strategy definition screen for Strategy#3 (idvg_short_bsim3v3)

Figure 7. Local optimization target selection screen for Strategy#3 (idvg_short_bsim3v3)

Strategy #4: idvg_small_bsim3v3

The strategy #4 is in the same family of optimization strategies as Strategy#1, #2 and #3. The geometries used for optimization should be narrow W and short L devices only. Strategy #4 will optimize the "Current" of "ID/VG" characteristics (Figure 8). The difference in this strategy compared to #1,#2 and #3 is the parameters.

The original BSIM3v3.1 model does not have a variety of parameters for modeling the small device effects. The threshold voltage adjustment parameters such as DVT0W, DVT1W and DVT2W are not recommended for use in small geometry effect modeling. Therefore the binning parameters should be utilized for the regions where there is a need for model improvement. Usually the threshold voltage and high gate field effects in the linear region need some improvement. The binning parameters PVTH0 and PRDSW parameters are included in strategy#4 to compensate the lack of standard model parameters for modeling the small device effects. The binning parameters are not included in the original UTMOST parameter table for the BSIM3v3.1 model. Therefore if there is a need to utilize these parameters they should be added to the parameter table with some initial values and minimum and maximum limits for the local optimization. It is suitable to select 2 or 3 small devices for each row of optimization. The ID/VG characteristics of the selected narrow W and short L devices should be present in the graphics screen.

The first row is used to optimize the parameters for the threshold shift (PVTH0) and the channel resistance (PRDSW) adjustment for small devices. There is no back bias effect so the "sweep/start" and "sweep/stop" are set to 1 (Figure 9). If there is a need to adjust the mobility or the mobility degradation parameters for the small devices, the binning parameters (PU0, PUA or PUB can be added to row#1).

The second row includes the back bias effects (PK2) but only concentrates around the threshold region. Therefore the current max is set to 40% (Figure 9). This parameter is optional. If the back gate effects are modeled well with existing model after running the strategy#1, #2 and #3 then there is no need to include the parameter "PK2" in the optimization. The same logic applies for all binning parameters. The user should check the fits after strategy #1, #2 and #3 and then make a judgment call based on the fits for the small device to run strategy#4 with default settings or to add or to subtract some of the binning parameters.

Figure 8. Local optimization strategy definition screen for Strategy#4 (idvg_small_bsim3v3).

Figure 9. Local optimization target selection screen for Strategy#4 (idvg_small_bsim3v3).

Strategy #5: idvd_0vb_bsim3v3

The first 4 strategies concentrated only on the linear regions (ID/VG) of different geometries. The strategy#5 will use the ID/VD data (saturation region) for optimization (Figure 10). Strategy#5 also uses different geometries for each row of the local optimization. The ID/VD at VB=0V characteristics of the all optimized devices should be present in the graphics screen.

The row#1 is used to optimize the ID/VD at VB=0V characteristics of the wide W and long L device only. The "Current Min." and "Current Max" is set to 1E-6 and 1 to cover the entire range of ID/VD characteristics 1µA (Figure 11). The default settings for the "Sweep/Start" and "Sweep/Stop" is set to 3 to 5. This settings can be changed by the user based on the fits quality. If the model needs more improvement for the higher VGS steps then Sweep Start and Stop values can be changed to 4 and 5 to cover the higher VG steps of the ID/VD characteristics. The parameters A0 and AGS are used for the wide W and long L device only.

The row#2 is used for saturation region optimization of the short channel devices only. Therefore the wide W and short L devices should be selected in the geometry selection screen for row#2. It is recommended to select maximum of 3 devices (typically 2). The default parameter for optimization is "VSAT". However the parameters A1 and A2 can be added to row#2 given that the model can not be improved with the existing parameters. This decision should be made after running the strategy #6 (optimization of the output resistances) and examining the fits for the ID/VD characteristics again.

The row#3 is same as row#2 except it is used for narrow W and long L devices. It is recommended to select maximum 3 devices (typically 2). The parameters B0 and B1 usually provide good fit results for narrow W devices.

The row#4 is used only if there is a need for the improvement of small device ID/VD characteristics. The binning parameter "PVSAT" is included in the row#4 as a recommendation for the binning parameter selection. This parameter (PVSAT) does not exist in the original parameter table so it should be added to the parameter table if needed.

Figure 10. Local optimization strategy definition screen for Strategy#5 (idvd_0vb_bsim3v3).

Figure 11. Local optimization target selection screen for Strategy#5 (idvd_0vb_bsim3v3).

Strategy #6: rds_0vb_bsim3v3

The strategy#6 has few different points compared to the rest of the strategies. The strategy#6 is used for the output resistance optimization. Therefore the "Derivative" option is selected in the Strategy Definition Screen" (Figure 12). The log scale "RDS/VDS" characteristics for all optimized devices should be present in the graphics screen before the execution of the strategy#6. The output resistance optimization is the most difficult part of BSIM3v3.1 modeling. Therefore the user should pay attention to the measured vs simulated data and include or exclude certain devices in the geometry selection screen to improve the optimization strategy.

For the output resistance optimization the wide W and long L device and typically 2 or 3 wide W and short L devices should be selected in row#1. In row#1 total number of 11 parameters are selected for optimization: "PCLM, PDIBLC1, PDIBLC2, PVAG, DROUT, DELTA, PSCBE1, PSCBE2, ETA0, DSUB" If the wide W and long L device seem to be dominant factor for the optimization results, this device can be excluded and only the short channel devices can used for re-optimization. The parameters "PSCBE1 and PSCBE2" can be excluded when optimizing for the PMOS devices because the impact ionization current will usually be negligible for PMOS devices.

Sometimes the output resistance fits for the small devices are not as good as the short channel devices. In such cases some binning parameters can be added to improve the fits for the small devices. These binning parameters can be such as: PETA0, PPDIBLC1, PPDIBLC2, PPVAG, PDROUT, etc.

Figure 12. Local optimization strategy definition screen for Strategy#6 (rds_0vb_bsim3v3).

Figure 13. Local optimization target selection screen for Strategy#6 (rds_0vb_bsim3v3).

Strategy #7: idvd_highvb_bsim3v3

The strategy#7 is used for the high VBS ID/VD characteristics of all devices. In strategy#7 each row is used for different geometries. The high VBS ID/VD characteristics should be present in graphics screen for all optimized devices.

The row#1 is used for the wide W and long L device only. The parameter "KETA" is the only standard BSIM3v3.1 parameter used for the high VBS modeling of ID/VD characteristics. However this parameter usually doesn't scale well for the short channel, narrow width and small devices. Therefore in the following row#2 #3 and #4 the binning parameters are introduced to provide the scaling. (Figure 14).

The row#2 is used for narrow W devices only. The parameter "WKETA" is a binning parameter and it should be added to the parameter screen by the UTMOST user. Typically 2 narrow W and long L devices are suitable for the row#2 optimization. The row#2 should be activated only the fit improvement is needed.

The row#3 is used for short L devices only. The parameter "LKETA" is a binning parameter and it should be added to the parameter screen by the UTMOST user. Typically 2 wide W and short L devices are suitable for row#2 optimization. The row#3 should be activated only fit improvement is needed.

The row#4 is used for narrow W devices only. The parameter "PKETA" is a binning parameter and it should be added to the parameter screen by the UTMOST user. Typically 2 narrow W and short L devices are suitable for the row#2 optimization. The row#4 should be activated only fit improvement is needed.

Figure 14. Local optimization strategy definition screen for Strategy#7 (rds_0vb_bsim3v3).

Figure 15. Local optimization target selection screen for Strategy#7 (rds_0vb_bsim3v3).

Strategy #8: rds_highvb_bsim3v3

The strategy#8 is very similar to strategy#6. The only difference is that the "RDS/VDS" data which is used for optimization has high VBS (Figure 16). For the high VBS output resistance optimization the wide W and short L devices (typically two) should be selected in the geometry selection screen and the selected device data should be present in the graphics screen.

The row#1 is the only active row in strategy#8. The parameters "ETAB and PDIBLCB" should be optimized for the RDS/VDS at high VBS data.

Figure 16. Local optimization strategy definition screen for Strategy#8 (rds_highvb_bsim3v3).

Figure 17. Local optimization target selection screen for Strategy#8 (rds_highvb_bsim3v3).

Strategy #9: idvg_temp_bsim3v3

Up to strategy#9 only room temperature data is used for the optimizations. The Strategy#9 and strategy#10 are used for the optimization of the temperature parameters. Therefore the data which is different to room temperature should be loaded to UTMOST before running strategy#9 and #10. The strategy#9 is used for the optimization of the threshold and mobility adjustment parameters. Each row is used for the optimization of the different geometries. The ID/VG characteristics at low VDS (0.1V) should be present in the graphics screen before running the strategy#9 (Figure 18).

The row#1 is used to adjust the threshold (KT1) and mobility (UTE, UA1, UB1) with temperature for the wide W and long L device only. The back bias effects are not included in row#1 therefore the "Sweep/start" and "Sweep/stop" is set to 1 (Figure 19).

The row#2 includes the back bias effects into the optimization (added parameters KT2 and UC1). The selected geometry should be wide W and long L only. (Figure 19).

The row#3 is used to optimize the temperature effects on threshold (KT1L) and the channel resistance (PRT) for the wide W and short L devices. Typically two devices are selected for optimization.

There are no standard BSIM3v3.1 parameters to adjust the temperature effect specifically for narrow W and small devices. Therefore in order to improve the fits some binning parameters such as: WUTE, PUTE, WKT1, PKT1, PPRT, WUA1, PUA1 can be added to the optimization.

Figure 18. Local optimization strategy definition screen for Strategy#9 (idvg_temp_bsim3v3).

Figure 19. Local optimization target selection screen for Strategy#9 (idvg_temp_bsim3v3).

Strategy #10: idvd_temp_bsim3v3

The strategy#10 is used for optimization of the temperature parameters for the ID/VD characteristics. The ID/VD characteristics at 0V VBS should be present in the graphics screen before running the strategy #10 (Figure 20).

The row#1 is used only for the short channel devices. The parameter AT is used to optimize the temperature effects on ID/VD characteristics.

Figure 20. Local optimization strategy definition screen for Strategy#10 (idvd_temp_bsim3v3).

Figure 21. Local optimization target selection screen for Strategy#10 (idvd_temp_bsim3v3).

Conclusion

A total of 10 local optimization strategies for the BSIM3v3.1 model have been presented in this article. The UTMOST user should go into each strategy and change the selected geometries in the "Geometry Selection Screen" according to the available devices before running any of these strategies. Some UTMOST users may have different local optimization strategies based on the older setup files. They can modify their local optimization strategies to be compatible with the latest strategies presented in this article.

It is NOT recommended to run all 10 strategies at once. The user should run each strategy one by one and observe the optimization results after each strategy is completed. The main local optimization screen should be kept open during the optimization. This screen is a good indicator if the selected strategy is running successfully or not.

Some strategies may provide better results if executed more than once. The user can repeat the same strategy few times. The strategy#5 and strategy#6 should be executed one after another several times.

The less binning parameters are used the more physical the model will be. The binning parameters should only be used if the improvement cannot be made with the existing standard BSIM3v3 parameters.