The Berkeley BSIM3SOI model, released in December 1997, is now available within SmartSpice as the MOSFET level=25 model. This model incorporates three separate implementations: the original Berkeley model implementation is invoked with the selector Berk=2; the Silvaco implementation is invoked with Berk=-2. The older Silvaco implementation, of October 1997, is also supported, under the selector Berk=-1.

All implementations produce virtually identical results when commonly accepted model parameter sets are used. However, the Silvaco Berk=-2 implementation supports a number of additional parameters and options, and provides certain improvements compared to what is supported in the Berk=2 (Berkeley) and Berk =-1 (older Silvaco) Level=25 models.

Physical effects

Major Features

Dynamic depletion selector (ddMod) to suit different requirements for SOI technologies
Dynamic depletion approach is applied on both I-V and C-V. Charge and Drain currents are scalable with Tbox and Tsi continuously
Single I-V expression as in BSIM3v3.1 to guarantee continuities of Ids, gds and gm and their derivatives for all bias conditions
Supports external body bias and backgate bias; a total of 6 nodes
Real floating body simulation in both I-V and C-V. Body potential is properly bounded by diode and C-V formulation
Self heating implementation improved over the alpha version
lAn improved impact ionization current model
Various diode leakage components and parasitic bipolar current included
New depletion charge model (EBCIO) introduced for better accuracy in capacitive coupling prediction. An improved BSIM3v3 based model is added as well

Figure 1. BSIM3SOI Level=25 partially and fully depleted models with floating
body: dc1.i represents PD model and dc2.i represent FD model.

Figure 2. Back-Gate effects for FD model with floating body: dc1.i is Ids current
for Vbg=0, dc2.i is Ids current for Vbg=3V and dc3.i is Ids current for Vbg=-3V.

Figure 3. Self-Heating effects: dc1.i represents curves without self-heating
and dc2.i represents curves with self-heating turned on.

Figure 4. Self-Heating effects with v(m1#temp) represents device temperature.

Impact Ionization Current Partitioning

Simulation results produced by S-Pisces show that the partitioning of the impact ionization current between source and drain significantly depends on the channel lengths.

In long channel devices 100% of the impact ionization current flows into the bulk. In short channel devices the entire impact ionization current flows into the source.

The IIRAT model parameter, implemented in SmartSpice, can be used to direct a certain portion of the substrate current to the source. If IIRAT=0 then the entire impact ionization current will be directed to the bulk of the device (for long channel devices). If IIRAT=1 then this current will be directed to the source, as in Berkeley's default model (for short channel devices). The binning parameters LIIRAT, WIIRAT and PIIRAT can be used to adjust the actual IIRAT value depending on the geometry of a particular device.

The IIRAT parameter was implemented as follows: when the IIRAT parameter is explicitly specified in the .MODEL card the values of the model parameters ALPHA0, ALPHA1 and BETA0 will be ignored. These values will instead be calculated automatically to provide a desired level of the substrate current partitioning between the bulk and source of the device.

Silvaco Improvements

Impact Ionization Current

In the Berkeley SOI model implementation the impact ionization current Isub depends on the model parameters ALPHA0 and BETA0. The current Isub represents a current directed from the drain to the bulk.

Simulation results produced by the device simulator Atlas show that the partitioning of the impact ionization current between bulk and source significantly depends on the channel lengths.

In long channel devices 100% of the impact ionization current flows into the bulk. In short channel devices the entire impact ionization current flows into the source.

In the Silvaco Berk=-2 model implementation the impact ionization current directed from the drain to the source is modeled as follows:

Iscbe = Idsa * PSCBE2*diffVd/Leff * exp(-PSCBE1* Litl/diffVd)

where

Idsa is the total drain current, including the CLM and DIBL effect currents;

diffVd = Vds - Vdsat;

PSCBE2 and PSCBE1 are the model parameters;

Litl is a bias independent parameter computed as a function of TOX and XJ.

3.2 Intrinsic Capacitance Model CAPMOD=0

The Berkeley SOI model implementation supports the intrinsic capacitance models CAPMOD=2 and 3. The Silvaco Berk=-2 model implementation also supports the CAPMOD=0 intrinsic capacitance model. It provides the best convergence and performance of the three. The most complicated model is CAPMOD=3; this Berkeley model has the worst convergence and performance of the three. The Berkeley CAPMOD=2 capacitance model has better convergence and performance than the CAPMOD=3 model, but these are still much worse than those obtained with the CAPMOD=0 model.

The Vfbcv model selector can be used with the CAPMOD=0 capacitance model: the recommended value is INTCAP=1. If this value is specified, then the flat band voltage will be calculated in the same manner as for CAPMOD=2. The INTCAP selector will be ignored if the VFBCV parameter is explicitly specified in the model card.

Summary of Silvaco's Unique Improvements

Added ACM equations for parasitics
Improved impact ionization current model
Improved self-heating model
Added CAPMOD=0 to improve convergence and physical modeling of intrinsic capacitances
Fully compatible to Berkeley
Convergence properties
- dramatic improvement
Model performance in CPU time:
- dramatic (10 to 20 times for large circuits)
EXPERT mode - unique for model problem diagnostics
Binning is available (for L, W and WL dependances)

Figure 5. S-Pisces simulation of a fully depleted SOI device that demonstrates
heating effects confirming the physical nature of the SOI model.

Figure 6. S-Pisces simulation confirming the thermal dependencies of an SOI device.

Binning Parameters

A number of binning parameters were re-implemented in the Level=25 Berk=-2 model. The binning procedure is supported for the following model parameters:

VHT0, RDSW, U0, KETA, K2, UA, PSCBE1 and PSCBE2.

and is identical to that used in the BSIM3 v3.1 MOSFET Level=8 model.

Geometry Parameter Calculation

In the Berkeley implementation, the geometry parameters NRD, NRS, AD,PD, AS, PS can only be specified as device parameters. In the Silvaco Berk=-2 model implementation, the geometry parameters NRD, NRS, AD,PD, AS, PS can also be calculated as functions of Weff and the following model parameters:

LD 0.0 "m" "Length difference"

LDIF 0.0 "m" "Lateral diffusion"

HDIF 0.0 "m" "Heavy doped region length"

RS 0.0 "Ohm" "Source resistance"

RD 0.0 "Ohm" "Drain resistance"

RSC 0.0 "Ohm" "Contact source resistance"

RDC 0.0 "Ohm" "Contact drain resistance"

References

[1] BSIM3SOI v1.0 Manual, Department of Electrical Engineering and Computer Sciences, University of California, Berkeley

BSIM3SOILevel=25 Model Released in SmartSpice

BSIM3SOI
Level=25 Model Released in SmartSpice