Simulation Standard - 1996

Volume 7, Number 1, January 1996

A SPAYN Analysis of Circuit Performance Data Obtained Using the Virtual Wafer Fab

Model Validation Using SmartSpice

BJT S-Parameter Measurement and Analysis Using UTMOST

Hints & Tips

Volume 7, Number 2, February 1996

CNET Physical Diffusion Model Included in ATHENA

Using The Power of The Interactive Tools: Part 2deckBuild Continued

III-V Material Parameter Tuning using VWF Automation Tools

Evaluation of a Recessed Channel SOI Technology for Scaling and Optimization

Hints & Tips

Volume 7, Number 3, March 1996

New Features in UTMOST Version 12.03.0

New Features in SPAYN version 1.6.0

New Features and Bug Fixes in SmartSpice Version 1.4.0

Hints & Tips

Volume 7, Number 4, April 1996

Transient Simulation of CMOS Device Latch-up

Simulation of ESD Pulse in a MOSFET Device

Simulation of AlGaAs/ GaAs HEMT

Simulation of Latch-up in an n-Channel IGBT

Simulation of Device Characteristics for a Silicon-on-Insulator MOSFET Device

Simulation of PMOS Device Characterization

Volume 7, Number 4, May 1996

SmartSpice BSIM3 Version 3

Parameter Extraction for the EKV MOSFET Model with UTMOST III

Modeling MOS Devices Using the MASTAR Model with UTMOST III

Hints and Tips

Volume 7, Number 4, June 1996

Temperature Dependence of Latch-up Holding Point for Majority Carrier Guards up to 250°C

Analysis of the Effect of Etchpit Defects on Breakdown Voltage

Process Oriented MESFET Models for Transistor Design using ATLAS and ATHENA/FLASH

Optimization of Photolithography CD Control Using VWF and Optolith

Hints and Tips

Volume 7, Number 5, September 1996

Comprehensive MOS Model Validation Environment Case Study: BSIM3v3

Multi-Plot Rubberband Option is Implemented in UTMOST

Wafer Map Distribution of Statistically Correlated Parameters

Running SmartSpice from the Cadence Framework

Extraction of the Effective Length and Width of Submicron MOS Transistors

MEXTRAM Biploar Implementation in SmartSpice

Hints & Tips

Volume 7, Number 6, October 1996

Advanced Diffusion Models Released in ATHENA 4.0

New ATLAS Release Supports Parallelization, Large Number of Advanced Models, and FRAM

Interactive Tools Continue to Stay Miles Ahead........".

Volume 7, Number 7, November 1996

Low and High Frequency Noise Modeling ofActive and Passive Devices

AC Model Validation Using Transient Analysis

Complete Circuit Simulation Solution for SOI Technology: Four New Models

Production Mode BSIM3v3 Data Collection and Parameter Extraction

Parametric Failure Analysis Using Wafer Map Display

Cutline and Circular Profiles of Parameter Distributions

Hints & Tips

Volume 7, Number 8, December 1996

Advanced Analytical Ion Implantation Models in ATHENA

New Quantum Mechanical Simulator in ATLAS

Accurate Extraction of Interconnect Parasitics Based on 3D Back-End Process Simulation

Simulation of Ferroelectric Materials (FRAM Devices) in ATLAS

Hints & Tips