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HiSIM:

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Background

As CMOS technologies shrink to below 90nm, the need for accurate circuit simulation SPICE model becomes acute. The current SPICE models, BSIM3 and BSIM4, are running out of capability when used to simulate CMOS circuits built in these technologies. The release of the new, speed and accuracy-improved HiSIM version 2.4 could not have come at a better time to address these needs.

HiSIM SPICE model has been developed at the University of Hiroshima, Japan, at the initiative of Professor Mitiko Miura-Mattausch.  The HiSIM model foundation is a departure from a traditional approach known as ‘Vth-based CMOS Model,’ and is based on what is now known as a ‘Surface Potential-Based Model.’  Surface Potential-Based Model accurately represents the physics of down to 65nm CMOS geometries and below.

Implementation History

Silvaco introduced the first version of the local optimization strategies for HiSIM 1.2 in 2002 in its UTMOST-III. Since then, the parameter extraction methodology has been reviewed thoroughly and updated to incorporate the ongoing HiSIM model refinements and improvements.

Rev. 102207_04