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CLEVER

RC EXTRACTOR FOR REALISTIC 3D STRUCTURES

CLEVER is a physics-based RC extractor that uses GDSII mask data and process information to create a realistic 3D structure for MEMS, advanced CMOS, TFT, Memory cells, etc., using its built-in etch/deposit processor and optolithographical simulator. CLEVER back annotates extracted RCs into SPICE netlist.

Key Features

 

Deep Submicron CMOS

 

CLEVER Simulated Via Structure

Round and cone-shaped vias.

 

Advanced 3D process models and automatic mesh generation allow complex processes to be simulated.

 

Simulation of Aluminum Dual Damascene process with nitride etch stops.

 

Flat Panel LCD and TFT Circuits

 
3D structure of the flat panel (scaled in z-direction).

 

Electric field distribution.

 

Field distribution derived from Cyclic boundary condition.

 

SRAM and Flash Memory Cell

Lithographic effects on metal geometry can affect the resulting capacitance significantly.

 

Six memory cells or partially completed SRAM array after removal of oxide insulation. SEM photograph (IBM).

 

3D structure of the SRAM cell.

 

MEMS Simulation

 

Productivity and Versatility

 

CLEVER Design Flow Versus the Traditional Flow

 

CLEVER in Full Chip Design

CLEVER Inputs/Outputs

 

Rev. 020309_23

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