DOWNLOADS | CONTACT US
Roadmap
USA Japan China Korea
TCAD
Analog / AMS / RF
Custom IC CAD
Interconnect Modeling
Digital CAD
Downloads & Support
Licensing
PDK Design Flows
Technical Library
Services
Corporate

 
Product Roadmaps
90 Day | 1 Year | 3 Year

SmartSpice

3 Year Development Roadmap, 2011 - 2014

SmartSpice core

  • Develop library of composite behavioural macromodels

Verilog-A

  • Complete support for Verilog-AMS LRM version 2.3

SmartView

  • Support for viewing and exporting PSF-ASCII/binary, WSF ASCII/binary, and PSPICE-DAT
  • Partial loading of data files by time range
  • Incremental loading of HSPICE ASCII format
  • Exporting in HSPICE data format
  • Print preview utility window
  • Export image to PDF
  • Advanced post processing and manipulations with data vectors
  • Specific measurement utilities for designs: Memory, PLL, DSP, ADC, and DAC
Copyright © 1984 - SILVACO, Inc. - Trademarks - Privacy Policy