Complete schematic-driven analog, mixed-signal, and RF circuit design environment

SmartSpice

SmartSpiceParallel SPICE Circuit Simulator. Delivers the highest performance and accuracy required to design complex high precision analog circuits, analog mixed-signal circuits, analyze critical nets, characterize cell libraries, etc..

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SmartSpice RF

SmartSpiceRFHarmonic Balance Based RF Simulator. Employs Time-Domain Shooting and Frequency-Domain Harmonic Balance methods to provide simulation of GHz range RF ICs.

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Verilog-A Language

Verilog-A LanguageSource, Compiled and Encrypted. Combines with SmartSpice to enable the design and verification of complex analog and mixed-signal circuits and models.

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Harmony

HarmonyAnalog/Mixed-Signal Simulator. Dynamically links in the capabilities of the SmartSpice Circuit Simulator and the SILOS Verilog Simulator at run time.

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SmartView

Verilog-A LanguageWaveform Viewer and Simulation Analysis Environment. SmartView is Silvaco’s graphical environment for performing real-time and post-simulation waveform viewing and data

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Rev. 060316_07