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ClarityRLC

RLC Netlist Reduction

ClarityRLC is an efficient and accurate tool that performs reduction of linear parasitic RLC elements in extracted netlists. Tool is based on Scattering-Parameter-Based Macromodeling and Time Domain methods.

Key Features

  • Capable of handling the netlists with multimillion number of parasitic elements produced by major EDA parasitic extractors
  • Significantly reduces runtime of post-layout and post-route simulations
  • Performs filtering of dangling elements and elements with value less than a user specified threshold
  • Performs parallel and series merging
  • Performs the netlist reduction in linear time using Scattering-Parameter-Based Macromodeling method and switches between it and Time Domain Method depending on reduction index of netlist
  • Analyses the interconnect models other than RC-trees, and therefore, coupling capacitors and resistor loops can be handled without loss of generality
  • Supports SPICE, DSPF, or SPEF formats
  • Silvaco's strong encryption is available to protect valuable customer and third party intellectual property.

Reduction Productivity, Easy to Adopt and Use

  • Preserves the accuracy with less than 3% error compared to SPICE simulations for original networks
  • Reduces up to 95% parasitic elements of RLC network
  • Custom scripts using LISA Scripting Language for processing of selecting subcircuits, cells, and nets
  • Comprehensive report about reduction process
  • Available for Unix, Linux (32 bit and 64 bit), and Windows platforms

SmartSpice Simulation RC tree network with 80,000 elements before and after reduction.

 

ClarityRLC Inputs/Outputs

Rev. 101410_02

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