Silvaco Rolls Out High Voltage IC Design Tool Suite

Santa Clara, April 5, 2004

Silvaco International, a leading provider of circuit simulation and electronic design automation (EDA) tools, today announced the release of its integrated High Voltage IC Design Tool Suite to address the unique needs of designers of high voltage ICs such as LCD drivers, TFT drivers, automotive, industrial, motor control, and power management ICs for laptops, PDAs, and other battery operated electronics.

Silvaco’s Scholar Schematic Editor is the front-end, driving the SmartSpice Circuit Simulator, Expert Layout Editor, and Guardian DRC/LVS/LPE tools. The suite is supported by Silvaco’s unique high voltage SPICE modeling capability and process design kits (PDKs).
“Scholar integrates design capture with our circuit simulation environment, and schematic driven layout,” said Ken Brock, vice president of marketing at Silvaco. “Our productive layout/verification tools supported with PDKs, complete the world’s best integrated tool flow for high voltage IC design.”

Challenges in High Voltage and Power Management IC Design

  • SPICE models accurate over a large range of voltage (40V), high current and temperature (-40C to175C) for bipolar and MOS devices
  • Accurate and fast circuit simulation analysis for multiple corner conditions
  • Precise manual layout including circular transistors
  • Complex device extraction of passive and active power transistors
  • Quickly and cost effectively develop an integrated design and verification flow with multiple EDA tools for processes with many unique devices.

Silvaco Unique Integrated Solution

The SmartSpice Circuit simulator provides the accuracy, convergence, speed and analysis features required for high voltage and power management design supporting legacy models and netlists from other circuit simulators as well as the IEEE-1364 Verilog-A language for compact device models and analog behavioral models.

Silvaco’s BSIM3 Level-88 is the only model that accurately simulates high voltage MOS transistors over their full range of voltage, current and temperature—avoiding the inaccuracies of standard BSIM3 models. These Level-88 models use 9 additional parameters to account for the many physical effects, including self-heating and asymmetric behavior. They have been adopted by several leading foundries that specialize in high voltage and power management processes.

The Scholar Schematic Editor is the integrated front-end of Silvaco’s high voltage IC design tool suite, providing schematic driven layout, netlist processing, and a simulation control environment for performing nested sweeps, circuit optimization, and other complex circuit analysis functions. The just-released Scholar 1.12 was significantly enhanced with an equation parser for rapid callbacks, EDIF 2 0 0 schematic import, and a new netlist processor with Pcell layout directives.
Productive, all-angle layout editing is provided by Expert Layout Editor. It executes parameterized cells (Pcells) written in the LISA scripting language for design-rule correct layout of complex devices such as circular, interdigitated and Christmas-tree power transistors and spiral inductors.

Guardian DRC/ERC/LVS Physical Verification software accurately checks rules, extracts layouts of complex power devices, and compares netlists—tightly integrated with Scholar and Expert for cross probing. It directly translates DRC/LVS rule files from other popular verification products.

Verified foundry process design kits provide for rapid deployment of foundry processes that meet the unique semiconductor requirements for the design of high voltage and power management products. Silvaco provides complete PDK development services to its foundry partners in supporting mutual customers. Complete SPICE model parameter extraction services are available for MOS and bipolar devices over the full military temperature range.

Pricing and Availability

Silvaco’s High Voltage IC Design Suite is available now on Windows, Linux, and Sun. Perpetual, time-based, and site licenses are available for workgroup configurations of these products. List price for a front-end seat of Scholar and SmartSpice starts at $35,000 for a perpetual license. For further information on these products, please contact

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