Stress simulation for a SoC Transistor TEG

vsex03.in : Stress simulation for a SoC Transistor TEG

Requires: Victory Process and Victory Stress
Minimum Versions: Victory Process 7.6.8.R, Victory Stress 2.4.8.R

In recent years, it has become increasingly important to investigate the effects of stress in MOS transistors for SoC (System on Chip) design because stress/strain effects are now used to improve the performance of the MOS transistors. Particularly, SoC transistor TEGs have attracted considerable attention in order to study the effects of stress liner films and the dependence on active region length, trench width, and gate-pitch.

This example demonstrates a stress simulation for a SoC transistor TEG. The 3D structure is created by about 30 command lines with three mask layers (GATE, ACTIVE, and CONTACT) using Victory Process. A 3D mesh is created for the stress calculation.

Then the stress distribution is simulated by Victory Stress. First, the result from Victory Process is loaded. The parameters of the materials such as young modulas, poisson ratio, and intrinsic stress are set. Then the matrix calculation method is set, and the stress is calculated. Finally, the structure, stress distribution and the stress enhanced mobility factors for electrons/holes are saved.

To load and run this example, select the Load example button in DeckBuild Examples window. This will copy the input file and any support files to your current working directory. Select the Run button to execute the example.

The image vsex03_0_vp_ex.png shows the 3-D topography after trench etching using the mask of the active area.

The image vsex03_1_vp_ex.png shows the 3-D topography after poly-silicon gates are formed using the mask of the gate.

The image vsex03_2_vp_conformal_ex.png shows the 3-D topography after contacts are formed using the mask of the contact.

The image vsex03_3_vp.png shows the stress distribution (sigmaXX) for the final 3-D structure.

The image vsex03_4_vp.png shows the distribution of the enhanced factor for the electron's mobility.

The file vsex03.inis the input deck for Victory Process and Victory Stress.