Flash EEPROM Programming and Erasing

eprmex01.in : Flash EEPROM Programming and Erasing

Requires: SSuprem 4/DevEdit/S-Pisces
Minimum Versions: Athena 5.22.1.R, Atlas 5.22.1.R

This example simulates the structure definition and electrical test of a FLASH EEPROM cell. The example consists of:

  • Dual gate EEPROM structure formation in Athena
  • Re-meshing in DevEdit
  • Threshold voltage simulation before programming
  • Transient programming simulation
  • Threshold voltage simulation after programming
  • Transient erasure simulation

For accurate simulation of programming and erasure it is vital to have a very accurate representation of the device structure. The gate and tunneling currents are very sensitive to geometry and doping profiles. It will be possible for you to alter process parameters and observe their effect on device performance directly with this input file.

The interface between Athena and Atlas is automatic. The electrode statements in Athena are used to define the electrode positions for Atlas. Any metal or polysilicon layer can optionally be set as an electrode region. The electrode names given in Athena are transferred into Atlas.

As with many of the examples provided, the grid structure for the example EEPROM device is rather coarse. This allows a realistic execution times for the example. When comparing simulated and real EEPROM devices, a finer grid is recommended. This can be done quickly by decreasing the space.mult parameter of the initialize statement.

To obtain a finer grid, DevEdit is used. This can effectively refine the grid for the electrical simulation. A finer mesh for resolving the dopant distribution is still recommended though.

The Atlas programming simulation consists of 3 basic parts. Firstly a threshold voltage simulation is done to obtain the EEPROM cell threshold in it's unprogrammed state. Then the device is biased into the initial condition of the transient with the high programming control gate voltage. Here 12V is used.

Next the programming transient is performed. Since the times involved in programming are much greater than the relaxation time of the device, the syntax method quasi can be used to specify the quasistatic method. This results in a large improvement in the speed of the calculation.

The programming consists of two solve statements. The first ramps the drain to 5.0V in 1ns. A solution file is saved at this point. This can be used to examine the potentials before charge is applied to the floating gate. The second line gives no change in the applied voltages, it simply leaves the device biased the condition VCG=12.0V and Vds=5.0V. During this time the hot electron injection model will predict values of gate current. This current coupled with the transient time step size is used to add charge self-consistently to the floating gate. A solution file is saved at the end of the transient.

Comparisons of device internal distributions, such as potentials can be done by comparing the two solution files from before programming and after the programming.

The final part of this run consists of a copy of the first part. A threshold voltage test is run on the EEPROM cell. In this case however the device is programmed and a large threshold voltage shift is seen.

The graphics output of this section shows plots of threshold voltage before and after programming. A plot of floating gate charge vs. time can be obtained from the result of the transient simulation. Also, the actual programming gate current can be seen falling off with time. This is because the increasing charge on the floating gate increases the threshold voltage of the device. This in turn reduces the drain current which will cause a drop in hot carrier density and hence a reduction in programming current.

It is possible to plot the showed the floating gate charge charge vs. time curve. This can be quickly converted to threshold voltage shift using the following formula:

Threshold Shift = Q Tox / L Eox

Where Q = floating gate charge per unit width, Tox = inter-poly oxide thickness, L = length of floating gate, Eox = absolute permittivity of oxide.

In this case Tox is converted into an effective Tox based on the thickness of each layer of the inter-poly ONO di-electric. This is done by:

Effective Tox = E oxide * (Tox1/Eox1 + Tnitride/Enitride + Tox2/Eox2 )

where Tx is thickness of x and Ex is relative permittivity of x.

The final run of this example is a transient erasure simulation. Atlas is restarted using the command go atlas . The correct set of erasing models for EEPROMs is chosen . The key models are fnord and bbt.std . fnord specifies the solution for Fowler Nordheim tunneling the main erasure mechanism for EEPROMs. bbt.std specifies the band to band tunneling model. This is required due to the high electric fields at the source/channel junction. Tunneling due to these fields leads to high substrate current during erasing.

After the models and other material parameters are set, the charge on the floating gate is ramped using the parameter q1. This 'q' works in an analogous manner to ramping voltages using 'v': q1 and qstep are the equivalent in charge to v1 and vstep. In EEPROM erasure the drain is disconnected to avoid large power consumption from source to drain breakdown currents. One way to disable a contact is to use current boundary conditions and force zero current. An alternative used here is to attach a very large resistor to the contact.

The transient erasure is performed in a single solve statement. The source electrode is ramped to 12.5V. The mechanism to remove charge from the floating gate is exactly analogous to programming. The only differences is the Fowler-Nordheim tunneling rather then hot electron injection as gate current. Obviously this will change the direction of the current through the gate oxide.

The resultant graphics show the transient erasing characteristic. To plot the threshold voltage shift, the same calculation given in the programming section can be used.

To load and run this example, select the Load example button in DeckBuild. This will copy the input file and any support files to your current working directory. Select the run button to execute the example.