Using SILOS and Verilog VPI (Verilog Procedural Interface).

004_vpi : Using SILOS and Verilog VPI (Verilog Procedural Interface).

Minimum Required Versions: SILOS 4.12.1.C

The example 004_vpi consists of a VPI source file, a Windows export definition file and a Verilog test file. We will create the VPI shared library and run a SILOS simulation that executes a "C" language function from Verilog source code.

Run a simulation that includes a system call to a VPI linked function.

  • Compile the "C" source file from the command line. For Windows use the command "cl /Zi /ML /Fr /c lrm_27.14.1.c" and for Linux use the command "gcc -c -fPIC lrm_27.14.1.c".
  • Link the shared library. For Windows use the command "link /def:lrm_27.14.1.def /dll libsilosdll.lib lrm_27.14.1.obj" and for Linux use the command "gcc -o lrm_27.14.1.so -fPIC -shared lrm_27.14.1.o".
  • Start SILOS, open the project file "vpi_test.spjx" and click "Go".
  • Observe the simulation output includes VPI related messages.
  • Double click on the "$stop" message.
  • Observe the VPI related code in the source edit window.