Successive Approximation Analog to Digital Converter

002_adc_sar : Successive Approximation Analog to Digital Converter

Minimum Required Version: Harmony 4.12.2.C

This example includes a SPICE testbench and a analog to digital converter circuit module implemented with Verilog-A sample and hold, digital to analog converter and comparator modules and a Verilog digital successive approximation register. The source files are main.in, toplevel.v, sha.va, dac.va, compar.va and sar.v.

Simulate the adc_sar circuit using Harmony.

  • Start Harmony and open the adc_sar.spjx project. The Harmony window title will now display <project_path>/adc_sar.spjx.
  • Run the simulation using Go toolbar button.
  • Open the Explorer window View->Explorer to view the circuit hierarchy.
  • Open the Analyzer waveform viewer to view the simulation results. Note that the analog signal sample is also displayed as a digital signal. This option is available as Display as Analog in the Analyzer signal list context menu.