Controlling SPICE simulations

003_cell : Controlling SPICE simulations

Minimum Required Versions: AccuCell 2.6.0.R, SmartSpice 4.6.2.R

This example explains the AccuCell options for controlling SPICE simulation options to maximize characterization speed for a given accuracy requirement.

AccuCell includes an unlimited license of the full SmartSpice engine as an embedded SPICE simulator for characterization jobs. SmartSpice provides excellent accuracy, convergence and execution speed. All SPICE simulation .option commands are fully supported to control simulation speed and accuracy. Both AccuCell and SmartSpice are 100% HSPICE and SPECTRE netlist and model compatible. Additionally, AccuCell supports ELDO, HSPICE (and SmartSpice) as external simulators. Support for Spectre as an external simulator is pending.

In most typical cases only basic control of the .tran timestep is required with no other SPICE options necessary for proper operation. Critical cases can, however, benefit from the addition of various SPICE .option directives.

To define the basic timestep the AccuCell library level .cfg command TRAN_ANALYSIS_STEP is used. To define optional SmartSpice .option directives the library level .cfg command SMARTSPICE_OPTIONS can be used. For HSPICE the .cfg command is HSPICE_OPTIONS and for ELDO the .cfg command is ELDO_OPTIONS . At times users may for audit purposes desire to have certain node results saved during characterization. This is supported with the SAVE_NODES cell level .cfg file command. (NOTE this is a SmartSpice and HSPICE only option.)

When generating reference results for:

  • simulator comparison,
  • golden library comparison,
  • process evaluation tuning or other similar critical situations,

use of the following option settings (exampled for SmartSpice) will aid in ensuring the best results:

TRAN_ANALYSIS_STEP 0.001 and SMARTSPICE_OPTIONS { accurate tmax=1p }

The above options are NOT intended for everyday use and will incur a significant speed loss. Other option settings may yield equivalent results in less time, but may not work in all situations.

In addition to the above settings the specification of an oversampled slope and load grid will permit ready validation of interpolated reduced index table results.

Characterization and evaluation of results from a 1X inverter and a 1x basic D Flip-Flop often tend to be the best choice for such stress test evaluations due to both ease of evaluation and the simplicity (flatness) of circuit design thereby resulting in the most non-linear behavior. If evaluation of vector set characterization behavior due to simultaneous multiple inputs switching effects is desired then the addition of a basic 1x two input nand gate should also be considered.

For a typical 0.18u process the accuracy differences between the default settings and the reference run range as follows:

  • input pin capacitance -0.05fF to -0.15fF (-1.5% to -3.5%) avg -0.1pF (-2.5%)
  • cell_rise -2.5ps to 1.2ps (-0.7% to 0.4%) avg -1ps (-0.3%)
  • rise_transition 0.6ps to 8.9ps (0.1% to 11%) avg 2ps (1%)
  • cell_fall -2.6ps to 2.7ps (-1.8% to 1%) avg -0.9ps (-0.4%)
  • fall_transition 0.8ps to 8.8ps (0.2% to 14%) avg 4ps (4%)
  • setup -1.6ps to 1.6ps (-2% to 1.8%) avg -0.1ps (0.15%)
  • hold -1.6ps to 1.6ps (-7.7% to 7.7%) avg 0.4ps (1.3%)

NOTE: default setup and hold search stop condition of 2ps used for both the default and ref testcases. This could have been reduced a factor of 2 to 4 with minimal run-time difference but would have resulted in the default run not using all default values therefore the reference run was left at this default stop setting.

Settings of TRAN_ANALYSIS_STEP and SMARTSPICE_OPTIONS between the default and the reference setting or use of alternate SPICE simulation options will yield results between the above results.

As an example the follow results (vs the reference run) were obtained in 155sec (compared to 22sec for the default run and 784sec(13min) for the reference run) from use of:

TRAN_ANALYSIS_STEP 0.001

SMARTSPICE_OPTIONS { accurate }

  • input pin capacitance -0.03fF to -0.04fF (-0.8% to -1%) avg -0.03pF (-0.9%)
  • cell_rise -0.01ps to 0.01ps (-0.01% to 0.01%) avg 0.001ps (0.001%)
  • rise_transition 0.0ps to 0.09ps (0.0% to 0.05%) avg 0.037ps (0.034%)
  • cell_fall -0.01ps to 0.02ps (-0.018% to 0.009%) avg 0.008ps (0.003%)
  • fall_transition 0.0ps to 0.1ps (0.0% to 0.18%) avg 0.04ps (0.046%)
  • setup -0.0ps to 0.0ps (-0.0% to 0.0%) avg -0.0ps (0.0%)
  • hold -0.0ps to 0.0ps (-0.0% to 0.0%) avg 0.0ps (0.0%)

It should be noted that AccuCell runs SmartSpice in a special cell characterization mode different from the defaults of a standalone SPICE simulation. The same SPICE simulation deck, if it relies upon default settings to define and control the simulation may result in minor differences in results. Depending on simulator setings, differences is results accuracy, convergence and simulation speed between different external simulators may be seen when utilizing default settings. This is normal and expected. These differences should be largely eliminated if all runs include the above reference option simulation settings.

Final fine tuning of library characterization settings should be done with a specific vendor and version of SPICE simulator and SPICE model using at least the inverter and D Flip-Flop discussed above. Evaluation of additional cell types and strengths may be of benfit in finalizing slopes, loads and simultor settings for optimal results speed and accuracy.

For additional details on specific SPICE simulator settings please refer to the simulator's documentation.